u-boot-brain/board/cds/mpc8548cds/config.mk
Ed Swarthout f2cff6b104 8548cds PCIE support.
Make the early L1 cache stack region guarded to prevent speculative
fetches outside the locked range.

Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions.
init.S whitespace cleanup.

Allow TEXT_BASE value to be specified on command line.  This allows it
to be set to 0xfffc0000 which cuts the uboot binary in half.

Clear and enable lbc and ecm errors.

Update last_busno in device-tree for pci and pcie.

Remove load of obsolete cpu/mpc85xx/pci.0

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:39:00 -05:00

33 lines
1017 B
Makefile

#
# Copyright 2004, 2007 Freescale Semiconductor.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# mpc8548cds board
#
ifndef TEXT_BASE
TEXT_BASE = 0xfff80000
endif
PLATFORM_CPPFLAGS += -DCONFIG_E500=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1