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https://github.com/brain-hackers/u-boot-brain
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03eecab9a1
lowlevel_init() of rmobile badly assumed that ip register holds return address. The commit "63ee53a7 armv7 cpu_init_crit: Simplify code" breaks this assumption. This patch removes this bad assumption and simplify code. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
89 lines
1.7 KiB
ArmAsm
89 lines
1.7 KiB
ArmAsm
/*
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* Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.Iwamatsu.yj@renesas.com>
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <linux/linkage.h>
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ENTRY(lowlevel_init)
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ldr r0, =MERAM_BASE
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mov r1, #0x0
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str r1, [r0]
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mrc p15, 0, r0, c0, c0, 5
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ands r0, r0, #0xF
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beq lowlevel_init__
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b wait_interrupt
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.pool
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.align 4
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wait_interrupt:
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#ifdef ICCICR
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ldr r1, =ICCICR
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mov r2, #0x0
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str r2, [r1]
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mov r2, #0xF0
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adds r1, r1, #4 /* ICCPMR */
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str r2, [r1]
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ldr r1, =ICCICR
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mov r2, #0x1
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str r2, [r1]
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#endif
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wait_loop:
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.long 0xE320F003 /* wfi */
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ldr r2, [r1, #0xC]
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str r2, [r1, #0x10]
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ldr r0, =MERAM_BASE
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ldr r2, [r0]
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cmp r2, #0
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movne pc, r2
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b wait_loop
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wait_loop_end:
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.pool
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.align 4
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lowlevel_init__:
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mov r0, #0x200000
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loop0:
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subs r0, r0, #1
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bne loop0
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ldr sp, MERAM_STACK
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b s_init
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.pool
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.align 4
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ENDPROC(lowlevel_init)
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.ltorg
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MERAM_STACK:
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.word LOW_LEVEL_MERAM_STACK
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