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ac486e3ba1
These two function nows ensure that the MPP is configured correctly for the SPI controller before any SPI access, and restore the initial configuration when the access is over. Since the used pins for the SPI controller can differ (2 possibilities for each signal), the used pins are configured with CONFIG_SYS_KW_SPI_MPP. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
68 lines
2.2 KiB
C
68 lines
2.2 KiB
C
/*
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*
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* Derived from drivers/spi/mpc8xxx_spi.c
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#ifndef __KW_SPI_H__
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#define __KW_SPI_H__
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/* SPI Registers on kirkwood SOC */
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struct kwspi_registers {
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u32 ctrl; /* 0x10600 */
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u32 cfg; /* 0x10604 */
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u32 dout; /* 0x10608 */
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u32 din; /* 0x1060c */
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u32 irq_cause; /* 0x10610 */
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u32 irq_mask; /* 0x10614 */
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};
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/* They are used to define CONFIG_SYS_KW_SPI_MPP
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* each of the below #defines selects which mpp is
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* configured for each SPI signal in spi_claim_bus
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* bit 0: selects pin for MOSI (MPP1 if 0, MPP6 if 1)
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* bit 1: selects pin for SCK (MPP2 if 0, MPP10 if 1)
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* bit 2: selects pin for MISO (MPP3 if 0, MPP11 if 1)
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*/
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#define MOSI_MPP6 (1 << 0)
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#define SCK_MPP10 (1 << 1)
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#define MISO_MPP11 (1 << 2)
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#define KWSPI_CLKPRESCL_MASK 0x1f
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#define KWSPI_CSN_ACT 1 /* Activates serial memory interface */
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#define KWSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */
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#define KWSPI_IRQUNMASK 1 /* unmask SPI interrupt */
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#define KWSPI_IRQMASK 0 /* mask SPI interrupt */
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#define KWSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */
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#define KWSPI_XFERLEN_1BYTE 0
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#define KWSPI_XFERLEN_2BYTE (1 << 5)
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#define KWSPI_XFERLEN_MASK (1 << 5)
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#define KWSPI_ADRLEN_1BYTE 0
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#define KWSPI_ADRLEN_2BYTE 1 << 8
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#define KWSPI_ADRLEN_3BYTE 2 << 8
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#define KWSPI_ADRLEN_4BYTE 3 << 8
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#define KWSPI_ADRLEN_MASK 3 << 8
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#define KWSPI_TIMEOUT 10000
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#endif /* __KW_SPI_H__ */
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