mirror of
https://github.com/brain-hackers/u-boot-brain
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d0b6f247a1
While we don't want PCAT timers for timing, we want timer 2 so that we can still make a beep. Re-purpose the PCAT driver for this, and enable it in coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
44 lines
1.3 KiB
C
44 lines
1.3 KiB
C
/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/i8254.h>
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#define TIMER2_VALUE 0x0a8e /* 440Hz */
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int pcat_timer_init(void)
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{
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/*
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* initialize 2, used to drive the speaker
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* (to start a beep: write 3 to port 0x61,
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* to stop it again: write 0)
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*/
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outb(PIT_CMD_CTR2 | PIT_CMD_BOTH | PIT_CMD_MODE3,
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PIT_BASE + PIT_COMMAND);
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outb(TIMER2_VALUE & 0xff, PIT_BASE + PIT_T2);
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outb(TIMER2_VALUE >> 8, PIT_BASE + PIT_T2);
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return 0;
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}
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