Fabio Estevam 0f1411bc8d spi: mxc_spi: Set master mode for all channels ... The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>		2013-04-13 17:46:42 +02:00
..
clock.h	mx5/6 clocks: Fix SDHC clocks	2012-10-15 11:54:12 -07:00
crm_regs.h	mx5 clocks: Fix get_lp_apm()	2012-10-15 11:54:11 -07:00
gpio.h	MX: Set a common gpio.h for all i.MX	2012-09-01 14:58:27 +02:00
imx-regs.h	spi: mxc_spi: Set master mode for all channels	2013-04-13 17:46:42 +02:00
iomux-mx51.h	mx5: add iomux-mx51.h include	2012-09-01 14:58:29 +02:00
iomux.h	MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged	2012-05-15 08:31:35 +02:00
mx5x_pins.h	mx5: Align SPI CS naming with i.MX53 reference manual	2012-11-19 08:48:59 +01:00
sys_proto.h	imx-common: cpu: add imx_ddr_size	2012-11-10 08:15:40 +01:00