mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-30 08:30:50 +09:00
2ff17d2f74
Previous patch "MLK-18044-4: crypto: caam: Fix pointer size to 32bit for i.MX8M" breaks the 64 bits CAAM. Since i.MX CAAM are all 32 bits no matter the ARM arch (32 or 64), to adapt and not break 64 bits CAAM support, add a new config CONFIG_CAAM_64BIT and new relevant type "caam_dma_addr_t". This config is default enabled when CONFIG_PHYS_64BIT is set except for iMX8M. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
68 lines
1.6 KiB
Plaintext
68 lines
1.6 KiB
Plaintext
config FSL_CAAM
|
|
bool "Freescale Crypto Driver Support"
|
|
select SHA_HW_ACCEL
|
|
imply CMD_HASH
|
|
help
|
|
Enables the Freescale's Cryptographic Accelerator and Assurance
|
|
Module (CAAM), also known as the SEC version 4 (SEC4). The driver uses
|
|
Job Ring as interface to communicate with CAAM.
|
|
|
|
config CAAM_64BIT
|
|
bool
|
|
default y if PHYS_64BIT && !ARCH_IMX8M
|
|
help
|
|
Select Crypto driver for 64 bits CAAM version
|
|
|
|
config SYS_FSL_HAS_SEC
|
|
bool
|
|
help
|
|
Enable Freescale Secure Boot and Trusted Architecture
|
|
|
|
config SYS_FSL_SEC_COMPAT_2
|
|
bool
|
|
help
|
|
Secure boot and trust architecture compatible version 2
|
|
|
|
config SYS_FSL_SEC_COMPAT_4
|
|
bool
|
|
help
|
|
Secure boot and trust architecture compatible version 4
|
|
|
|
config SYS_FSL_SEC_COMPAT_5
|
|
bool
|
|
help
|
|
Secure boot and trust architecture compatible version 5
|
|
|
|
config SYS_FSL_SEC_COMPAT_6
|
|
bool
|
|
help
|
|
Secure boot and trust architecture compatible version 6
|
|
|
|
config SYS_FSL_SEC_BE
|
|
bool "Big-endian access to Freescale Secure Boot"
|
|
|
|
config SYS_FSL_SEC_COMPAT
|
|
int "Freescale Secure Boot compatibility"
|
|
depends on SYS_FSL_HAS_SEC
|
|
default 2 if SYS_FSL_SEC_COMPAT_2
|
|
default 4 if SYS_FSL_SEC_COMPAT_4
|
|
default 5 if SYS_FSL_SEC_COMPAT_5
|
|
default 6 if SYS_FSL_SEC_COMPAT_6
|
|
|
|
config SYS_FSL_SEC_LE
|
|
bool "Little-endian access to Freescale Secure Boot"
|
|
|
|
if FSL_CAAM
|
|
|
|
config FSL_CAAM_RNG
|
|
bool "Enable Random Number Generator support"
|
|
depends on DM_RNG
|
|
default y
|
|
help
|
|
Enable support for the hardware based random number generator
|
|
module of the CAAM. The random data is fetched from the DRGB
|
|
using the prediction resistance flag which means the DRGB is
|
|
reseeded from the TRNG every time random data is generated.
|
|
|
|
endif
|