u-boot-brain/nand_spl
Matthew McClintock 02ea538ce9 nand_spl: p1023rds: wait before enabling DDR controller
We have a requirement to wait a period of time before enabling the
DDR controller

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:17 -05:00
..
board nand_spl: p1023rds: wait before enabling DDR controller 2012-08-23 10:24:17 -05:00
nand_boot_fsl_elbc.c nand/fsl_elbc: shrink SPL a bit by converting out_be32() to __raw_writel() 2012-08-22 16:07:43 -05:00
nand_boot_fsl_ifc.c nand: Freescale Integrated Flash Controller NAND support 2011-09-29 19:01:04 -05:00
nand_boot_fsl_nfc.c IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers 2011-04-27 19:38:05 +02:00
nand_boot.c nand_spl: store ecc data on the stack 2012-01-26 16:09:06 -06:00