mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
d98b0523cf
Now that warm booting is not supported, there isn't a need for the BOOTFLAG_COLD and BOOTFLAG_WARM defines, so remove them. Note that this change makes the board info bd_bootflags field useless. It will always be set to 0, but we leave it around so that we don't break the board info structure that some OSes are expecting to be passed from U-Boot. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
346 lines
11 KiB
C
346 lines
11 KiB
C
/*
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* (C) Copyright 2001
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define MV_VERSION "v0.2.0"
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/* LED0 = Power , LED1 = Error , LED2-5 = error code, LED6-7=00 -->PPCBoot error */
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#define ERR_NONE 0
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#define ERR_ENV 1
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#define ERR_BOOTM_BADMAGIC 2
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#define ERR_BOOTM_BADCRC 3
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#define ERR_BOOTM_GUNZIP 4
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#define ERR_BOOTP_TIMEOUT 5
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#define ERR_DHCP 6
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#define ERR_TFTP 7
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#define ERR_NOLAN 8
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#define ERR_LANDRV 9
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#define CONFIG_BOARD_TYPES 1
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#define MVBLUE_BOARD_BOX 1
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#define MVBLUE_BOARD_LYNX 2
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#define CONFIG_SYS_TEXT_BASE 0xFFF00000
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#if 0
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#define ERR_LED(code) do { if (code) \
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*(volatile char *)(0xff000003) = ( 3 | (code<<4) ) & 0xf3; \
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else \
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*(volatile char *)(0xff000003) = ( 1 ); \
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} while(0)
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#else
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#define ERR_LED(code)
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#endif
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#define CONFIG_MPC824X 1
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#define CONFIG_MPC8245 1
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#define CONFIG_MVBLUE 1
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#define CONFIG_CLOCKS_IN_MHZ 1
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#define CONFIG_BOARD_TYPES 1
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOT_RETRY_TIME -1
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#define CONFIG_AUTOBOOT_KEYED
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#define CONFIG_AUTOBOOT_PROMPT \
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"autoboot in %d seconds (stop with 's')...\n", bootdelay
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#define CONFIG_AUTOBOOT_STOP_STR "s"
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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#define CONFIG_RESET_TO_RETRY 60
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/*
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* Command line configuration.
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*/
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_BOOTD
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_ECHO
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#define CONFIG_CMD_SAVEENV
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_IMI
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_RUN
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_BOOTP_NISDOMAIN
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_DNS
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_BOOTP_NTPSERVER
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#define CONFIG_BOOTP_TIMEOFFSET
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* Max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* Default load address */
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#define CONFIG_BOOTCOMMAND "run nfsboot"
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#define CONFIG_BOOTARGS "root=/dev/mtdblock5 ro rootfstype=jffs2"
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#define CONFIG_NFSBOOTCOMMAND "bootp; run nfsargs addcons;bootm"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"console_nr=0\0" \
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"dhcp_client_id=mvBOX-XP\0" \
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"dhcp_vendor-class-identifier=mvBOX\0" \
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"adminboot=setenv bootargs root=/dev/mtdblock5 rw rootfstype=jffs2;run addcons;bootm ffc00000\0" \
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"flashboot=setenv bootargs root=/dev/mtdblock5 ro rootfstype=jffs2;run addcons;bootm ffc00000\0" \
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"safeboot=setenv bootargs root=/dev/mtdblock2 rw rootfstype=cramfs;run addcons;bootm ffc00000\0" \
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"hdboot=setenv bootargs root=/dev/hda1;run addcons;bootm ffc00000\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
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"addcons=setenv bootargs ${bootargs} console=ttyS${console_nr},${baudrate}N8\0" \
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"mv_version=" MV_VERSION "\0" \
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"bootretry=30\0"
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#define CONFIG_OVERWRITE_ETHADDR_ONCE
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/*-----------------------------------------------------------------------
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* PCI stuff
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*-----------------------------------------------------------------------
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*/
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#define CONFIG_PCI
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#define CONFIG_PCI_PNP
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#define CONFIG_PCI_SCAN_SHOW
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#define CONFIG_NET_MULTI
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#define CONFIG_NET_RETRY_COUNT 5
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#define CONFIG_TULIP
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#define CONFIG_TULIP_FIX_DAVICOM 1
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#define CONFIG_ETHADDR b6:b4:45:eb:fb:c0
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#define CONFIG_HW_WATCHDOG
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/*-----------------------------------------------------------------------
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* Start addresses for the final memory configuration
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* (Set up by the startup code)
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* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
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*/
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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#define CONFIG_SYS_FLASH_BASE 0xFFF00000
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
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#define CONFIG_SYS_EUMB_ADDR 0xFC000000
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#define CONFIG_SYS_MONITOR_LEN 0x00100000
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#define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve some kB for malloc() */
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#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 1M ... 8M in DRAM */
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/* Maximum amount of RAM. */
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#define CONFIG_SYS_MAX_RAM_SIZE 0x10000000 /* 0 .. 256MB of (S)DRAM */
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#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
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#undef CONFIG_SYS_RAMBOOT
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#else
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#define CONFIG_SYS_RAMBOOT
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#endif
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#define CONFIG_SYS_ISA_IO 0xFE000000
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/*
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* serial configuration
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*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
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#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_EUMB_ADDR + 0x4500)
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#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_EUMB_ADDR + 0x4600)
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/*-----------------------------------------------------------------------
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* Definitions for initial stack pointer and data area
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*/
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#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
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#define CONFIG_SYS_INIT_RAM_END 0x1000
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#define CONFIG_SYS_GBL_DATA_SIZE 128
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
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/*
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* Low Level Configuration Settings
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* (address mappings, register initial values, etc.)
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* You should know what you are doing if you make changes here.
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* For the detail description refer to the MPC8240 user's manual.
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*/
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#define CONFIG_SYS_CLK_FREQ 33000000
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#define CONFIG_SYS_HZ 10000
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/* Bit-field values for MCCR1. */
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#define CONFIG_SYS_ROMNAL 7
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#define CONFIG_SYS_ROMFAL 11
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/* Bit-field values for MCCR2. */
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#define CONFIG_SYS_TSWAIT 0x5
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#define CONFIG_SYS_REFINT 430
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/* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4. */
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#define CONFIG_SYS_BSTOPRE 121
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/* Bit-field values for MCCR3. */
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#define CONFIG_SYS_REFREC 8
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/* Bit-field values for MCCR4. */
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#define CONFIG_SYS_PRETOACT 3
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#define CONFIG_SYS_ACTTOPRE 5
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#define CONFIG_SYS_ACTORW 3
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#define CONFIG_SYS_SDMODE_CAS_LAT 3
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#define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1
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#define CONFIG_SYS_EXTROM 1
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#define CONFIG_SYS_REGDIMM 0
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#define CONFIG_SYS_DBUS_SIZE2 1
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#define CONFIG_SYS_SDMODE_WRAP 0
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#define CONFIG_SYS_PGMAX 0x32
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#define CONFIG_SYS_SDRAM_DSCD 0x20
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/* Memory bank settings.
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* Only bits 20-29 are actually used from these vales to set the
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* start/end addresses. The upper two bits will always be 0, and the lower
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* 20 bits will be 0x00000 for a start address, or 0xfffff for an end
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* address. Refer to the MPC8240 book.
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*/
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#define CONFIG_SYS_BANK0_START 0x00000000
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#define CONFIG_SYS_BANK0_END (CONFIG_SYS_MAX_RAM_SIZE - 1)
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#define CONFIG_SYS_BANK0_ENABLE 1
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#define CONFIG_SYS_BANK1_START 0x3ff00000
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#define CONFIG_SYS_BANK1_END 0x3fffffff
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#define CONFIG_SYS_BANK1_ENABLE 0
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#define CONFIG_SYS_BANK2_START 0x3ff00000
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#define CONFIG_SYS_BANK2_END 0x3fffffff
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#define CONFIG_SYS_BANK2_ENABLE 0
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#define CONFIG_SYS_BANK3_START 0x3ff00000
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#define CONFIG_SYS_BANK3_END 0x3fffffff
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#define CONFIG_SYS_BANK3_ENABLE 0
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#define CONFIG_SYS_BANK4_START 0x3ff00000
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#define CONFIG_SYS_BANK4_END 0x3fffffff
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#define CONFIG_SYS_BANK4_ENABLE 0
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#define CONFIG_SYS_BANK5_START 0x3ff00000
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#define CONFIG_SYS_BANK5_END 0x3fffffff
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#define CONFIG_SYS_BANK5_ENABLE 0
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#define CONFIG_SYS_BANK6_START 0x3ff00000
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#define CONFIG_SYS_BANK6_END 0x3fffffff
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#define CONFIG_SYS_BANK6_ENABLE 0
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#define CONFIG_SYS_BANK7_START 0x3ff00000
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#define CONFIG_SYS_BANK7_END 0x3fffffff
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#define CONFIG_SYS_BANK7_ENABLE 0
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#define CONFIG_SYS_ODCR 0xff
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#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
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#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
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#define CONFIG_SYS_IBAT1L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
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#define CONFIG_SYS_IBAT1U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
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#define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
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#define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
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#define CONFIG_SYS_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
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#define CONFIG_SYS_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
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#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
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#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
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#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
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#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
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#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
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#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
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#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
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#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#undef CONFIG_SYS_FLASH_PROTECTION
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 63 /* Max number of sectors per flash */
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#define CONFIG_SYS_FLASH_ERASE_TOUT 12000
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#define CONFIG_SYS_FLASH_WRITE_TOUT 1000
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_OFFSET 0x00010000
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#define CONFIG_ENV_SIZE 0x00010000
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#define CONFIG_ENV_SECT_SIZE 0x00010000
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/*-----------------------------------------------------------------------
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* Cache Configuration
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*/
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#define CONFIG_SYS_CACHELINE_SIZE 32
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
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#endif
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#endif /* __CONFIG_H */
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