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https://github.com/brain-hackers/u-boot-brain
synced 2024-08-21 17:38:51 +09:00
![Walter Lozano](/assets/img/avatar_default.png)
Currently when using OF_PLATDATA the binding between devices and drivers is done trying to match the compatible string in the node with a driver name. However, usually a single driver supports multiple compatible strings which causes that only devices which its compatible string matches a driver name get bound. To overcome this issue, this patch adds the U_BOOT_DRIVER_ALIAS macro, which generates no code at all, but allows an easy way to declare driver name aliases. Thanks to this, dtoc could be improve to look for the driver name based on its alias when it populates the U_BOOT_DEVICE entry. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
631 lines
17 KiB
C
631 lines
17 KiB
C
/*
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* COM1 NS16550 support
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* originally from linux source (arch/powerpc/boot/ns16550.c)
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* modified to use CONFIG_SYS_ISA_MEM and new defines
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*/
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#include <clock_legacy.h>
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <errno.h>
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#include <log.h>
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#include <ns16550.h>
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#include <reset.h>
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#include <serial.h>
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#include <watchdog.h>
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#include <linux/err.h>
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#include <linux/types.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
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#define UART_MCRVAL (UART_MCR_DTR | \
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UART_MCR_RTS) /* RTS/DTR */
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#if !CONFIG_IS_ENABLED(DM_SERIAL)
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#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
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#define serial_out(x, y) outb(x, (ulong)y)
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#define serial_in(y) inb((ulong)y)
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#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
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#define serial_out(x, y) out_be32(y, x)
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#define serial_in(y) in_be32(y)
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#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
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#define serial_out(x, y) out_le32(y, x)
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#define serial_in(y) in_le32(y)
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#else
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#define serial_out(x, y) writeb(x, y)
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#define serial_in(y) readb(y)
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#endif
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#endif /* !CONFIG_DM_SERIAL */
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#if defined(CONFIG_SOC_KEYSTONE)
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#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
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#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
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#undef UART_MCRVAL
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#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
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#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
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#else
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#define UART_MCRVAL (UART_MCR_RTS)
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#endif
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#endif
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#ifndef CONFIG_SYS_NS16550_IER
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#define CONFIG_SYS_NS16550_IER 0x00
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#endif /* CONFIG_SYS_NS16550_IER */
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static inline void serial_out_shift(void *addr, int shift, int value)
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{
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#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
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outb(value, (ulong)addr);
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#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
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out_le32(addr, value);
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#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
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out_be32(addr, value);
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#elif defined(CONFIG_SYS_NS16550_MEM32)
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writel(value, addr);
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#elif defined(CONFIG_SYS_BIG_ENDIAN)
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writeb(value, addr + (1 << shift) - 1);
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#else
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writeb(value, addr);
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#endif
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}
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static inline int serial_in_shift(void *addr, int shift)
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{
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#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
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return inb((ulong)addr);
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#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
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return in_le32(addr);
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#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
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return in_be32(addr);
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#elif defined(CONFIG_SYS_NS16550_MEM32)
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return readl(addr);
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#elif defined(CONFIG_SYS_BIG_ENDIAN)
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return readb(addr + (1 << shift) - 1);
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#else
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return readb(addr);
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#endif
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}
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#if CONFIG_IS_ENABLED(DM_SERIAL)
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#ifndef CONFIG_SYS_NS16550_CLK
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#define CONFIG_SYS_NS16550_CLK 0
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#endif
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/*
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* Use this #ifdef for now since many platforms don't define in(), out(),
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* out_le32(), etc. but we don't have #defines to indicate this.
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*
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* TODO(sjg@chromium.org): Add CONFIG options to indicate what I/O is available
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* on a platform
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*/
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#ifdef CONFIG_NS16550_DYNAMIC
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static void serial_out_dynamic(struct ns16550_platdata *plat, u8 *addr,
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int value)
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{
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if (plat->flags & NS16550_FLAG_IO) {
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outb(value, addr);
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} else if (plat->reg_width == 4) {
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if (plat->flags & NS16550_FLAG_ENDIAN) {
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if (plat->flags & NS16550_FLAG_BE)
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out_be32(addr, value);
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else
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out_le32(addr, value);
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} else {
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writel(value, addr);
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}
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} else if (plat->flags & NS16550_FLAG_BE) {
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writeb(value, addr + (1 << plat->reg_shift) - 1);
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} else {
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writeb(value, addr);
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}
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}
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static int serial_in_dynamic(struct ns16550_platdata *plat, u8 *addr)
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{
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if (plat->flags & NS16550_FLAG_IO) {
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return inb(addr);
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} else if (plat->reg_width == 4) {
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if (plat->flags & NS16550_FLAG_ENDIAN) {
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if (plat->flags & NS16550_FLAG_BE)
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return in_be32(addr);
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else
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return in_le32(addr);
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} else {
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return readl(addr);
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}
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} else if (plat->flags & NS16550_FLAG_BE) {
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return readb(addr + (1 << plat->reg_shift) - 1);
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} else {
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return readb(addr);
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}
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}
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#else
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static inline void serial_out_dynamic(struct ns16550_platdata *plat, u8 *addr,
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int value)
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{
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}
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static inline int serial_in_dynamic(struct ns16550_platdata *plat, u8 *addr)
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{
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return 0;
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}
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#endif /* CONFIG_NS16550_DYNAMIC */
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static void ns16550_writeb(NS16550_t port, int offset, int value)
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{
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struct ns16550_platdata *plat = port->plat;
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unsigned char *addr;
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offset *= 1 << plat->reg_shift;
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addr = (unsigned char *)plat->base + offset + plat->reg_offset;
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if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
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serial_out_dynamic(plat, addr, value);
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else
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serial_out_shift(addr, plat->reg_shift, value);
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}
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static int ns16550_readb(NS16550_t port, int offset)
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{
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struct ns16550_platdata *plat = port->plat;
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unsigned char *addr;
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offset *= 1 << plat->reg_shift;
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addr = (unsigned char *)plat->base + offset + plat->reg_offset;
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if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
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return serial_in_dynamic(plat, addr);
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else
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return serial_in_shift(addr, plat->reg_shift);
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}
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static u32 ns16550_getfcr(NS16550_t port)
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{
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struct ns16550_platdata *plat = port->plat;
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return plat->fcr;
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}
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/* We can clean these up once everything is moved to driver model */
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#define serial_out(value, addr) \
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ns16550_writeb(com_port, \
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(unsigned char *)addr - (unsigned char *)com_port, value)
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#define serial_in(addr) \
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ns16550_readb(com_port, \
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(unsigned char *)addr - (unsigned char *)com_port)
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#else
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static u32 ns16550_getfcr(NS16550_t port)
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{
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return UART_FCR_DEFVAL;
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}
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#endif
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int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
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{
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const unsigned int mode_x_div = 16;
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return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
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}
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static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
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{
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/* to keep serial format, read lcr before writing BKSE */
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int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE;
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serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr);
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serial_out(baud_divisor & 0xff, &com_port->dll);
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serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
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serial_out(lcr_val, &com_port->lcr);
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}
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void NS16550_init(NS16550_t com_port, int baud_divisor)
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{
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#if (defined(CONFIG_SPL_BUILD) && \
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(defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
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/*
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* On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
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* before SPL starts only THRE bit is set. We have to empty the
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* transmitter before initialization starts.
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*/
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if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
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== UART_LSR_THRE) {
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if (baud_divisor != -1)
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NS16550_setbrg(com_port, baud_divisor);
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else {
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// Re-use old baud rate divisor to flush transmit reg.
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const int dll = serial_in(&com_port->dll);
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const int dlm = serial_in(&com_port->dlm);
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const int divisor = dll | (dlm << 8);
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NS16550_setbrg(com_port, divisor);
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}
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serial_out(0, &com_port->mdr1);
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}
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#endif
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while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
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;
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serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
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#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL)
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serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
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#endif
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serial_out(UART_MCRVAL, &com_port->mcr);
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serial_out(ns16550_getfcr(com_port), &com_port->fcr);
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/* initialize serial config to 8N1 before writing baudrate */
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serial_out(UART_LCRVAL, &com_port->lcr);
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if (baud_divisor != -1)
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NS16550_setbrg(com_port, baud_divisor);
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#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \
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defined(CONFIG_OMAP_SERIAL)
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/* /16 is proper to hit 115200 with 48MHz */
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serial_out(0, &com_port->mdr1);
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#endif
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#if defined(CONFIG_SOC_KEYSTONE)
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serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
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#endif
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}
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#ifndef CONFIG_NS16550_MIN_FUNCTIONS
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void NS16550_reinit(NS16550_t com_port, int baud_divisor)
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{
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serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
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NS16550_setbrg(com_port, 0);
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serial_out(UART_MCRVAL, &com_port->mcr);
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serial_out(ns16550_getfcr(com_port), &com_port->fcr);
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NS16550_setbrg(com_port, baud_divisor);
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}
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#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
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void NS16550_putc(NS16550_t com_port, char c)
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{
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while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
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;
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serial_out(c, &com_port->thr);
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/*
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* Call watchdog_reset() upon newline. This is done here in putc
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* since the environment code uses a single puts() to print the complete
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* environment upon "printenv". So we can't put this watchdog call
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* in puts().
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*/
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if (c == '\n')
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WATCHDOG_RESET();
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}
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#ifndef CONFIG_NS16550_MIN_FUNCTIONS
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char NS16550_getc(NS16550_t com_port)
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{
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while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
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#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
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extern void usbtty_poll(void);
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usbtty_poll();
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#endif
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WATCHDOG_RESET();
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}
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return serial_in(&com_port->rbr);
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}
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int NS16550_tstc(NS16550_t com_port)
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{
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return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
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}
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#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
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#ifdef CONFIG_DEBUG_UART_NS16550
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#include <debug_uart.h>
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static inline void _debug_uart_init(void)
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{
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struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
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int baud_divisor;
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/*
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* We copy the code from above because it is already horribly messy.
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* Trying to refactor to nicely remove the duplication doesn't seem
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* feasible. The better fix is to move all users of this driver to
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* driver model.
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*/
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baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
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CONFIG_BAUDRATE);
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serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
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serial_dout(&com_port->mcr, UART_MCRVAL);
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serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
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serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
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serial_dout(&com_port->dll, baud_divisor & 0xff);
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serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
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serial_dout(&com_port->lcr, UART_LCRVAL);
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}
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static inline int NS16550_read_baud_divisor(struct NS16550 *com_port)
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{
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int ret;
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serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
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ret = serial_din(&com_port->dll) & 0xff;
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ret |= (serial_din(&com_port->dlm) & 0xff) << 8;
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serial_dout(&com_port->lcr, UART_LCRVAL);
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return ret;
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}
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static inline void _debug_uart_putc(int ch)
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{
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struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
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while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) {
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#ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED
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if (!NS16550_read_baud_divisor(com_port))
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return;
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#endif
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}
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serial_dout(&com_port->thr, ch);
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}
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DEBUG_UART_FUNCS
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#endif
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#if CONFIG_IS_ENABLED(DM_SERIAL)
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static int ns16550_serial_putc(struct udevice *dev, const char ch)
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{
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struct NS16550 *const com_port = dev_get_priv(dev);
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if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
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return -EAGAIN;
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serial_out(ch, &com_port->thr);
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/*
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* Call watchdog_reset() upon newline. This is done here in putc
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* since the environment code uses a single puts() to print the complete
|
|
* environment upon "printenv". So we can't put this watchdog call
|
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* in puts().
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*/
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if (ch == '\n')
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WATCHDOG_RESET();
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return 0;
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}
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static int ns16550_serial_pending(struct udevice *dev, bool input)
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{
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struct NS16550 *const com_port = dev_get_priv(dev);
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if (input)
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return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
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else
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return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
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}
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static int ns16550_serial_getc(struct udevice *dev)
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{
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struct NS16550 *const com_port = dev_get_priv(dev);
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if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
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return -EAGAIN;
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return serial_in(&com_port->rbr);
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}
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static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
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{
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struct NS16550 *const com_port = dev_get_priv(dev);
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struct ns16550_platdata *plat = com_port->plat;
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int clock_divisor;
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clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
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NS16550_setbrg(com_port, clock_divisor);
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return 0;
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}
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static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
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{
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struct NS16550 *const com_port = dev_get_priv(dev);
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int lcr_val = UART_LCR_WLS_8;
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uint parity = SERIAL_GET_PARITY(serial_config);
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uint bits = SERIAL_GET_BITS(serial_config);
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uint stop = SERIAL_GET_STOP(serial_config);
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/*
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* only parity config is implemented, check if other serial settings
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* are the default one.
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*/
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if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP)
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return -ENOTSUPP; /* not supported in driver*/
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switch (parity) {
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case SERIAL_PAR_NONE:
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/* no bits to add */
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break;
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case SERIAL_PAR_ODD:
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lcr_val |= UART_LCR_PEN;
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break;
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case SERIAL_PAR_EVEN:
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lcr_val |= UART_LCR_PEN | UART_LCR_EPS;
|
|
break;
|
|
default:
|
|
return -ENOTSUPP; /* not supported in driver*/
|
|
}
|
|
|
|
serial_out(lcr_val, &com_port->lcr);
|
|
return 0;
|
|
}
|
|
|
|
static int ns16550_serial_getinfo(struct udevice *dev,
|
|
struct serial_device_info *info)
|
|
{
|
|
struct NS16550 *const com_port = dev_get_priv(dev);
|
|
struct ns16550_platdata *plat = com_port->plat;
|
|
|
|
info->type = SERIAL_CHIP_16550_COMPATIBLE;
|
|
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
|
|
info->addr_space = SERIAL_ADDRESS_SPACE_IO;
|
|
#else
|
|
info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
|
|
#endif
|
|
info->addr = plat->base;
|
|
info->reg_width = plat->reg_width;
|
|
info->reg_shift = plat->reg_shift;
|
|
info->reg_offset = plat->reg_offset;
|
|
info->clock = plat->clock;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ns16550_serial_assign_base(struct ns16550_platdata *plat, ulong base)
|
|
{
|
|
if (base == FDT_ADDR_T_NONE)
|
|
return -EINVAL;
|
|
|
|
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
|
|
plat->base = base;
|
|
#else
|
|
plat->base = (unsigned long)map_physmem(base, 0, MAP_NOCACHE);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
int ns16550_serial_probe(struct udevice *dev)
|
|
{
|
|
struct ns16550_platdata *plat = dev->platdata;
|
|
struct NS16550 *const com_port = dev_get_priv(dev);
|
|
struct reset_ctl_bulk reset_bulk;
|
|
fdt_addr_t addr;
|
|
int ret;
|
|
|
|
/*
|
|
* If we are on PCI bus, either directly attached to a PCI root port,
|
|
* or via a PCI bridge, assign platdata->base before probing hardware.
|
|
*/
|
|
if (device_is_on_pci_bus(dev)) {
|
|
addr = devfdt_get_addr_pci(dev);
|
|
ret = ns16550_serial_assign_base(plat, addr);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
ret = reset_get_bulk(dev, &reset_bulk);
|
|
if (!ret)
|
|
reset_deassert_bulk(&reset_bulk);
|
|
|
|
com_port->plat = dev_get_platdata(dev);
|
|
NS16550_init(com_port, -1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
|
enum {
|
|
PORT_NS16550 = 0,
|
|
PORT_JZ4780,
|
|
};
|
|
#endif
|
|
|
|
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
|
|
int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
|
|
{
|
|
struct ns16550_platdata *plat = dev->platdata;
|
|
const u32 port_type = dev_get_driver_data(dev);
|
|
fdt_addr_t addr;
|
|
struct clk clk;
|
|
int err;
|
|
|
|
addr = dev_read_addr(dev);
|
|
err = ns16550_serial_assign_base(plat, addr);
|
|
if (err && !device_is_on_pci_bus(dev))
|
|
return err;
|
|
|
|
plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
|
|
plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
|
|
plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
|
|
|
|
err = clk_get_by_index(dev, 0, &clk);
|
|
if (!err) {
|
|
err = clk_get_rate(&clk);
|
|
if (!IS_ERR_VALUE(err))
|
|
plat->clock = err;
|
|
} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
|
|
debug("ns16550 failed to get clock\n");
|
|
return err;
|
|
}
|
|
|
|
if (!plat->clock)
|
|
plat->clock = dev_read_u32_default(dev, "clock-frequency",
|
|
CONFIG_SYS_NS16550_CLK);
|
|
if (!plat->clock) {
|
|
debug("ns16550 clock not defined\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
plat->fcr = UART_FCR_DEFVAL;
|
|
if (port_type == PORT_JZ4780)
|
|
plat->fcr |= UART_FCR_UME;
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
const struct dm_serial_ops ns16550_serial_ops = {
|
|
.putc = ns16550_serial_putc,
|
|
.pending = ns16550_serial_pending,
|
|
.getc = ns16550_serial_getc,
|
|
.setbrg = ns16550_serial_setbrg,
|
|
.setconfig = ns16550_serial_setconfig,
|
|
.getinfo = ns16550_serial_getinfo,
|
|
};
|
|
|
|
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
|
|
/*
|
|
* Please consider existing compatible strings before adding a new
|
|
* one to keep this table compact. Or you may add a generic "ns16550"
|
|
* compatible string to your dts.
|
|
*/
|
|
static const struct udevice_id ns16550_serial_ids[] = {
|
|
{ .compatible = "ns16550", .data = PORT_NS16550 },
|
|
{ .compatible = "ns16550a", .data = PORT_NS16550 },
|
|
{ .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
|
|
{ .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
|
|
{ .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
|
|
{}
|
|
};
|
|
#endif /* OF_CONTROL && !OF_PLATDATA */
|
|
|
|
#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
|
|
|
|
/* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
|
|
#if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
|
|
U_BOOT_DRIVER(ns16550_serial) = {
|
|
.name = "ns16550_serial",
|
|
.id = UCLASS_SERIAL,
|
|
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
|
|
.of_match = ns16550_serial_ids,
|
|
.ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
|
|
.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
|
|
#endif
|
|
.priv_auto_alloc_size = sizeof(struct NS16550),
|
|
.probe = ns16550_serial_probe,
|
|
.ops = &ns16550_serial_ops,
|
|
#if !CONFIG_IS_ENABLED(OF_CONTROL)
|
|
.flags = DM_FLAG_PRE_RELOC,
|
|
#endif
|
|
};
|
|
|
|
U_BOOT_DRIVER_ALIAS(ns16550_serial, rockchip_rk3328_uart)
|
|
U_BOOT_DRIVER_ALIAS(ns16550_serial, rockchip_rk3368_uart)
|
|
U_BOOT_DRIVER_ALIAS(ns16550_serial, ti_da830_uart)
|
|
#endif
|
|
#endif /* SERIAL_PRESENT */
|
|
|
|
#endif /* CONFIG_DM_SERIAL */
|