mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-08 05:43:21 +09:00
02778f2f1b
When dropping jump block support, the assumption was that all bootroms supported entry point redirection via the EVT1 register. Unfortunately, this turned out to be incorrect for the oldest Blackfin parts (BF533-0.2 and older and BF561). No one really noticed earlier because these parts usually are booted by bypassing the bootrom entirely, and older BF533 parts are not supported at all (too many anomalies). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
75 lines
2.8 KiB
C
75 lines
2.8 KiB
C
/*
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* blackfin-config-pre.h - common defines for Blackfin boards in config.h
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*
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* Copyright (c) 2007 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __ASM_BLACKFIN_CONFIG_PRE_H__
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#define __ASM_BLACKFIN_CONFIG_PRE_H__
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/* Misc helper functions */
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#define XMK_STR(x) #x
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#define MK_STR(x) XMK_STR(x)
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#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
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/* Bootmode defines -- your config needs to select this via CONFIG_BFIN_BOOT_MODE.
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* Depending on your cpu, some of these may not be valid, check your HRM.
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* The actual values here are meaningless as long as they're unique.
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*/
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#define BFIN_BOOT_BYPASS 1 /* bypass bootrom */
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#define BFIN_BOOT_PARA 2 /* boot ldr out of parallel flash */
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#define BFIN_BOOT_SPI_MASTER 3 /* boot ldr out of serial flash */
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#define BFIN_BOOT_SPI_SLAVE 4 /* boot ldr as spi slave */
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#define BFIN_BOOT_TWI_MASTER 5 /* boot ldr over twi device */
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#define BFIN_BOOT_TWI_SLAVE 6 /* boot ldr over twi slave */
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#define BFIN_BOOT_UART 7 /* boot ldr over uart */
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#define BFIN_BOOT_IDLE 8 /* do nothing, just idle */
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#define BFIN_BOOT_FIFO 9 /* boot ldr out of FIFO */
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#define BFIN_BOOT_MEM 10 /* boot ldr out of memory (warmboot) */
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#define BFIN_BOOT_16HOST_DMA 11 /* boot ldr from 16-bit host dma */
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#define BFIN_BOOT_8HOST_DMA 12 /* boot ldr from 8-bit host dma */
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#define BFIN_BOOT_NAND 13 /* boot ldr from nand flash */
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#ifndef __ASSEMBLY__
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static inline const char *get_bfin_boot_mode(int bfin_boot)
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{
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switch (bfin_boot) {
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case BFIN_BOOT_BYPASS: return "bypass";
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case BFIN_BOOT_PARA: return "parallel flash";
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case BFIN_BOOT_SPI_MASTER: return "spi flash";
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case BFIN_BOOT_SPI_SLAVE: return "spi slave";
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case BFIN_BOOT_TWI_MASTER: return "i2c flash";
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case BFIN_BOOT_TWI_SLAVE: return "i2c slave";
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case BFIN_BOOT_UART: return "uart";
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case BFIN_BOOT_IDLE: return "idle";
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case BFIN_BOOT_FIFO: return "fifo";
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case BFIN_BOOT_MEM: return "memory";
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case BFIN_BOOT_16HOST_DMA: return "16bit dma";
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case BFIN_BOOT_8HOST_DMA: return "8bit dma";
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case BFIN_BOOT_NAND: return "nand flash";
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default: return "INVALID";
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}
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}
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#endif
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/* Most bootroms allow for EVT1 redirection */
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#if (defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) \
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&& __SILICON_REVISION__ < 3) || defined(__ADSPBF561__)
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# undef CONFIG_BFIN_BOOTROM_USES_EVT1
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#else
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# define CONFIG_BFIN_BOOTROM_USES_EVT1
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#endif
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/* Define the default SPI CS used when booting out of SPI */
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#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
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defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__) || \
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defined(__ADSPBF51x__)
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# define BFIN_BOOT_SPI_SSEL 2
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#else
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# define BFIN_BOOT_SPI_SSEL 1
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#endif
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#endif
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