mirror of
https://github.com/brain-hackers/u-boot-brain
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09f3ca3dd5
We have finished Generic Board conversion for ARM and PowerPC, i.e. all the boards have been converted except OpenRISC, SuperH, SPARC, which have not supported Generic Board framework yet. Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro defines in include/configs/*.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
155 lines
4.7 KiB
C
155 lines
4.7 KiB
C
/*
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* Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __KZM9G_H
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#define __KZM9G_H
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#undef DEBUG
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#define CONFIG_SH73A0
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#define CONFIG_KZM_A9_GT
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#define CONFIG_RMOBILE_BOARD_STRING "KMC KZM-A9-GT"
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#define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
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#include <asm/arch/rmobile.h>
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_BOOTARGS "root=/dev/null console=ttySC4,115200"
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_VERSION_VARIABLE
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#undef CONFIG_SHOW_BOOT_PROGRESS
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/* MEMORY */
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#define KZM_SDRAM_BASE (0x40000000)
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#define PHYS_SDRAM KZM_SDRAM_BASE
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#define PHYS_SDRAM_SIZE (512 * 1024 * 1024)
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#define CONFIG_NR_DRAM_BANKS (1)
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/* NOR Flash */
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#define KZM_FLASH_BASE (0x00000000)
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#define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE)
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#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
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#define CONFIG_SYS_MAX_FLASH_BANKS (1)
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#define CONFIG_SYS_MAX_FLASH_SECT (512)
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/* prompt */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_PBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE 512
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#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
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/* SCIF */
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#define CONFIG_SCIF_CONSOLE
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#define CONFIG_CONS_SCIF4
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#undef CONFIG_SYS_CONSOLE_INFO_QUIET
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#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
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#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
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#define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE)
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#define CONFIG_SYS_MEMTEST_END \
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(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
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#undef CONFIG_SYS_ALT_MEMTEST
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#undef CONFIG_SYS_MEMTEST_SCRATCH
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#undef CONFIG_SYS_LOADS_BAUD_CHANGE
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#define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */
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#define CONFIG_SYS_INIT_RAM_SIZE (0x10000)
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#define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024)
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#define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
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#define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
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#define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE)
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
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#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
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#define CONFIG_SYS_TEXT_BASE 0x00000000
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#define CONFIG_STANDALONE_LOAD_ADDR 0x41000000
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/* FLASH */
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_CFI
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#undef CONFIG_SYS_FLASH_QUIET_TEST
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#define CONFIG_SYS_FLASH_EMPTY_INFO
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#define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */
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#define CONFIG_ENV_SIZE FLASH_SECTOR_SIZE
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#define CONFIG_ENV_OFFSET FLASH_SECTOR_SIZE
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
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/* Timeout for Flash erase operations (in ms) */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
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/* Timeout for Flash write operations (in ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
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/* Timeout for Flash set sector lock bit operations (in ms) */
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#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
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/* Timeout for Flash clear lock bit operations (in ms) */
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#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
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#undef CONFIG_SYS_FLASH_PROTECTION
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#undef CONFIG_SYS_DIRECT_FLASH_TFTP
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#define CONFIG_ENV_IS_IN_FLASH
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/* GPIO / PFC */
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#define CONFIG_SH_GPIO_PFC
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/* Clock */
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#define CONFIG_GLOBAL_TIMER
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#define CONFIG_SYS_CLK_FREQ (48000000)
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#define CONFIG_SYS_CPU_CLK (1196000000)
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
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/* Ether */
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_SMC911X
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#define CONFIG_SMC911X_BASE (0x10000000)
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#define CONFIG_SMC911X_32_BIT
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#define CONFIG_NFS_TIMEOUT 10000UL
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/* I2C */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_SH
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#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
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#define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
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#define CONFIG_SYS_I2C_SH_SPEED0 100000
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#define CONFIG_SYS_I2C_SH_BASE1 0xE6822000
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#define CONFIG_SYS_I2C_SH_SPEED1 100000
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#define CONFIG_SYS_I2C_SH_BASE2 0xE6824000
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#define CONFIG_SYS_I2C_SH_SPEED2 100000
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#define CONFIG_SYS_I2C_SH_BASE3 0xE6826000
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#define CONFIG_SYS_I2C_SH_SPEED3 100000
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#define CONFIG_SYS_I2C_SH_BASE4 0xE6828000
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#define CONFIG_SYS_I2C_SH_SPEED4 100000
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#define CONFIG_SH_I2C_8BIT
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#define CONFIG_SH_I2C_DATA_HIGH 4
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#define CONFIG_SH_I2C_DATA_LOW 5
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#define CONFIG_SH_I2C_CLOCK 104000000 /* 104 MHz */
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#endif /* __KZM9G_H */
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