mirror of
https://github.com/brain-hackers/u-boot-brain
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e456a81935
Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL
enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The
configurations are meant to help the development of SPL on RISC-V.
The configurations enable RAM as the only SPL boot device. Images must
be loaded at address 0x80200000. In the default boot flow, U-Boot SPL
starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot
proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is
then started in supervisor mode by OpenSBI.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
66 lines
1.5 KiB
C
66 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <linux/sizes.h>
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#ifdef CONFIG_SPL
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#define CONFIG_SPL_MAX_SIZE 0x00100000
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#define CONFIG_SPL_BSS_START_ADDR 0x84000000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
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#define CONFIG_SYS_SPL_MALLOC_START 0x84100000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
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#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
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#endif
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
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#define CONFIG_SYS_MALLOC_LEN SZ_8M
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#define CONFIG_SYS_BOOTM_LEN SZ_64M
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#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
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/* Environment options */
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#define CONFIG_ENV_SIZE SZ_128K
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#ifndef CONFIG_SPL_BUILD
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#define BOOT_TARGET_DEVICES(func) \
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func(QEMU, qemu, na) \
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func(VIRTIO, virtio, 0) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#define BOOTENV_DEV_QEMU(devtypeu, devtypel, instance) \
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"bootcmd_qemu=" \
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"if env exists kernel_start; then " \
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"bootm ${kernel_start} - ${fdtcontroladdr};" \
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"fi;\0"
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#define BOOTENV_DEV_NAME_QEMU(devtypeu, devtypel, instance) \
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"qemu "
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0xffffffffffffffff\0" \
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"initrd_high=0xffffffffffffffff\0" \
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"kernel_addr_r=0x84000000\0" \
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"fdt_addr_r=0x88000000\0" \
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"scriptaddr=0x88100000\0" \
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"pxefile_addr_r=0x88200000\0" \
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"ramdisk_addr_r=0x88300000\0" \
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BOOTENV
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#endif
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#endif /* __CONFIG_H */
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