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019ef9a3f3
This pll code is primarily based on the code from the kendryte standalone sdk in lib/drivers/sysctl.c. k210_pll_calc_config is roughly analogous to the algorithm used to set the pll frequency, but it has been completely rewritten to be fixed-point based. Signed-off-by: Sean Anderson <seanga2@gmail.com> CC: Lukasz Majewski <lukma@denx.de>
13 lines
381 B
Plaintext
13 lines
381 B
Plaintext
config CLK_K210
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bool "Clock support for Kendryte K210"
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depends on CLK && CLK_CCF
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help
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This enables support clock driver for Kendryte K210 platforms.
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config CLK_K210_SET_RATE
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bool "Enable setting the Kendryte K210 PLL rate"
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depends on CLK_K210
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help
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Add functionality to calculate new rates for K210 PLLs. Enabling this
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feature adds around 1K to U-Boot's final size.
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