mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
111 lines
3.3 KiB
C
111 lines
3.3 KiB
C
#define PHYADDR 0x01
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#define NO_PHY_REGS 0x20
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#define DEFAULT_PHY_PHYID1 0x0007
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#define DEFAULT_PHY_PHYID2 0xC0A3
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#define PHY_MODECTL 0x00
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#define PHY_MODESTAT 0x01
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#define PHY_PHYID1 0x02
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#define PHY_PHYID2 0x03
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#define PHY_ANAR 0x04
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#define PHY_ANLPAR 0x05
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#define PHY_ANER 0x06
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#define PHY_RESET 0x8000
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#define PHY_ANEG_EN 0x1000
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#define PHY_DUPLEX 0x0100
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#define PHY_SPD_SET 0x2000
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#define RECV_BUFSIZE (0x614)
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typedef volatile u32 reg32;
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typedef volatile u16 reg16;
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typedef struct ADI_DMA_CONFIG_REG {
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u16 b_DMA_EN:1; /* 0 Enabled */
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u16 b_WNR:1; /* 1 Direction */
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u16 b_WDSIZE:2; /* 2:3 Transfer word size */
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u16 b_DMA2D:1; /* 4 DMA mode */
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u16 b_RESTART:1; /* 5 Retain FIFO */
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u16 b_DI_SEL:1; /* 6 Data interrupt timing select */
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u16 b_DI_EN:1; /* 7 Data interrupt enabled */
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u16 b_NDSIZE:4; /* 8:11 Flex descriptor size */
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u16 b_FLOW:3; /* 12:14Flow */
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} ADI_DMA_CONFIG_REG;
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typedef struct adi_ether_frame_buffer {
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u16 NoBytes; /* the no. of following bytes */
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u8 Dest[6]; /* destination MAC address */
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u8 Srce[6]; /* source MAC address */
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u16 LTfield; /* length/type field */
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u8 Data[0]; /* payload bytes */
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} ADI_ETHER_FRAME_BUFFER;
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/* 16 bytes/struct */
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typedef struct dma_descriptor {
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struct dma_descriptor *NEXT_DESC_PTR;
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u32 START_ADDR;
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ADI_DMA_CONFIG_REG CONFIG;
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} DMA_DESCRIPTOR;
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/* 10 bytes/struct in 12 bytes */
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typedef struct adi_ether_buffer {
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DMA_DESCRIPTOR Dma[2]; /* first for the frame, second for the status */
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ADI_ETHER_FRAME_BUFFER *FrmData;/* pointer to data */
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struct adi_ether_buffer *pNext; /* next buffer */
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struct adi_ether_buffer *pPrev; /* prev buffer */
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u16 IPHdrChksum; /* the IP header checksum */
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u16 IPPayloadChksum; /* the IP header and payload checksum */
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volatile u32 StatusWord; /* the frame status word */
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} ADI_ETHER_BUFFER;
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/* 40 bytes/struct in 44 bytes */
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void SetupMacAddr(u8 * MACaddr);
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void PollMdcDone(void);
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void WrPHYReg(u16 PHYAddr, u16 RegAddr, u16 Data);
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u16 RdPHYReg(u16 PHYAddr, u16 RegAddr);
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void SoftResetPHY(void);
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void DumpPHYRegs(void);
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int SetupSystemRegs(int *opmode);
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/**
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* is_zero_ether_addr - Determine if give Ethernet address is all zeros.
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* @addr: Pointer to a six-byte array containing the Ethernet address
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*
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* Return true if the address is all zeroes.
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*/
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static inline int is_zero_ether_addr(const u8 * addr)
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{
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return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
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}
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/**
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* is_multicast_ether_addr - Determine if the Ethernet address is a multicast.
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* @addr: Pointer to a six-byte array containing the Ethernet address
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*
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* Return true if the address is a multicast address.
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* By definition the broadcast address is also a multicast address.
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*/
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static inline int is_multicast_ether_addr(const u8 * addr)
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{
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return (0x01 & addr[0]);
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}
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/**
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* is_valid_ether_addr - Determine if the given Ethernet address is valid
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* @addr: Pointer to a six-byte array containing the Ethernet address
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*
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* Check that the Ethernet address (MAC) is not 00:00:00:00:00:00, is not
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* a multicast address, and is not FF:FF:FF:FF:FF:FF.
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*
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* Return true if the address is valid.
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*/
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static inline int is_valid_ether_addr(const u8 * addr)
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{
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/* FF:FF:FF:FF:FF:FF is a multicast address so we don't need to
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* explicitly check for it here. */
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return !is_multicast_ether_addr(addr) && !is_zero_ether_addr(addr);
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}
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