mirror of
https://github.com/brain-hackers/u-boot-brain
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f760c9a1fd
Some IPIs may already be pending when U-Boot is started. This could be a problem if a secondary hart tries to handle an IPI before the boot hart has initialized the IPI device. To be specific, the Kendryte K210 ROM-based bootloader does not clear IPIs before passing control to U-Boot. Without this patch, the secondary hart jumps to address 0x0 as soon as it enters secondary_hart_loop, and then hangs in its trap handler. This commit introduces a valid bit so secondary harts know when and IPI originates from U-Boot, and it is safe to use the IPI API. The valid bit is initialized to 0 by board_init_f_init_reserve. Before this, secondary harts wait in wait_for_gd_init. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Leo Liang <ycliang@andestech.com>
126 lines
2.7 KiB
C
126 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 Fraunhofer AISEC,
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* Lukas Auer <lukas.auer@aisec.fraunhofer.de>
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <asm/barrier.h>
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#include <asm/smp.h>
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DECLARE_GLOBAL_DATA_PTR;
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static int send_ipi_many(struct ipi_data *ipi, int wait)
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{
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ofnode node, cpus;
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u32 reg;
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int ret, pending;
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cpus = ofnode_path("/cpus");
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if (!ofnode_valid(cpus)) {
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pr_err("Can't find cpus node!\n");
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return -EINVAL;
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}
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ofnode_for_each_subnode(node, cpus) {
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/* skip if hart is marked as not available in the device tree */
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if (!ofnode_is_available(node))
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continue;
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/* read hart ID of CPU */
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ret = ofnode_read_u32(node, "reg", ®);
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if (ret)
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continue;
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/* skip if it is the hart we are running on */
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if (reg == gd->arch.boot_hart)
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continue;
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if (reg >= CONFIG_NR_CPUS) {
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pr_err("Hart ID %d is out of range, increase CONFIG_NR_CPUS\n",
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reg);
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continue;
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}
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#ifndef CONFIG_XIP
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/* skip if hart is not available */
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if (!(gd->arch.available_harts & (1 << reg)))
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continue;
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#endif
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gd->arch.ipi[reg].addr = ipi->addr;
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gd->arch.ipi[reg].arg0 = ipi->arg0;
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gd->arch.ipi[reg].arg1 = ipi->arg1;
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/*
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* Ensure valid only becomes set when the IPI parameters are
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* set. An IPI may already be pending on other harts, so we
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* need a way to signal that the IPI device has been
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* initialized, and that it is ok to call the function.
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*/
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__smp_store_release(&gd->arch.ipi[reg].valid, 1);
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ret = riscv_send_ipi(reg);
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if (ret) {
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pr_err("Cannot send IPI to hart %d\n", reg);
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return ret;
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}
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if (wait) {
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pending = 1;
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while (pending) {
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ret = riscv_get_ipi(reg, &pending);
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if (ret)
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return ret;
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}
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}
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}
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return 0;
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}
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void handle_ipi(ulong hart)
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{
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int ret;
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void (*smp_function)(ulong hart, ulong arg0, ulong arg1);
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if (hart >= CONFIG_NR_CPUS)
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return;
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/*
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* If valid is not set, then U-Boot has not requested the IPI. The
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* IPI device may not be initialized, so all we can do is wait for
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* U-Boot to initialize it and send an IPI
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*/
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if (!__smp_load_acquire(&gd->arch.ipi[hart].valid))
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return;
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smp_function = (void (*)(ulong, ulong, ulong))gd->arch.ipi[hart].addr;
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invalidate_icache_all();
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/*
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* Clear the IPI to acknowledge the request before jumping to the
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* requested function.
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*/
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ret = riscv_clear_ipi(hart);
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if (ret) {
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pr_err("Cannot clear IPI of hart %ld (error %d)\n", hart, ret);
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return;
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}
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smp_function(hart, gd->arch.ipi[hart].arg0, gd->arch.ipi[hart].arg1);
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}
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int smp_call_function(ulong addr, ulong arg0, ulong arg1, int wait)
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{
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struct ipi_data ipi = {
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.addr = addr,
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.arg0 = arg0,
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.arg1 = arg1,
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};
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return send_ipi_many(&ipi, wait);
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}
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