mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
e86463f8e3
This converts the PLMT driver from the riscv-specific timer interface to be a DM-based UCLASS_TIMER driver. The clock-frequency/clocks properties are preferred over timebase-frequency for two reasons. First, properties which affect a device should be located near its binding in the device tree. Using timebase-frequency only really makes sense when the cpu itself is the timer device. This is the case when we read the time from a CSR, but not when there is a separate device. Second, it lets the device use the clock subsystem which adds flexibility. If the device is configured for a different clock speed, the timer can adjust itself. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
49 lines
1.1 KiB
C
49 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (c) 2017 Microsemi Corporation.
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* Padmarao Begari, Microsemi Corporation <padmarao.begari@microsemi.com>
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*/
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#ifndef __ASM_GBL_DATA_H
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#define __ASM_GBL_DATA_H
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#include <asm/smp.h>
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#include <asm/u-boot.h>
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#include <compiler.h>
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/* Architecture-specific global data */
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struct arch_global_data {
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long boot_hart; /* boot hart id */
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phys_addr_t firmware_fdt_addr;
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#ifdef CONFIG_SIFIVE_CLINT
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void __iomem *clint; /* clint base address */
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#endif
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#ifdef CONFIG_ANDES_PLIC
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void __iomem *plic; /* plic base address */
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#endif
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#if CONFIG_IS_ENABLED(SMP)
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struct ipi_data ipi[CONFIG_NR_CPUS];
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#endif
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#ifndef CONFIG_XIP
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ulong available_harts;
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#endif
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};
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#include <asm-generic/global_data.h>
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#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("gp")
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static inline void set_gd(volatile gd_t *gd_ptr)
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{
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#ifdef CONFIG_64BIT
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asm volatile("ld gp, %0\n" : : "m"(gd_ptr));
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#else
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asm volatile("lw gp, %0\n" : : "m"(gd_ptr));
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#endif
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}
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#endif /* __ASM_GBL_DATA_H */
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