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![Heiko Schocher](/assets/img/avatar_default.png)
!! This breaks support for all arm boards !! To compile in old style, you must define CONFIG_SYS_ARM_WITHOUT_RELOC or you can compile with "CONFIG_SYS_ARM_WITHOUT_RELOC=1 ./MAKEALL board" !! This define will be removed soon, so convert your board to use relocation support Portions of this work were supported by funding from the CE Linux Forum. Signed-off-by: Heiko Schocher <hs@denx.de> Fix boot from NAND for non-ARM systems Signed-off-by: Wolfgang Denk <wd@denx.de>
279 lines
7.4 KiB
C
279 lines
7.4 KiB
C
/*
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* (C) Copyright 2006-2008
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <nand.h>
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#include <asm/io.h>
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#define CONFIG_SYS_NAND_READ_DELAY \
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{ volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; }
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static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
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#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
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/*
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* NAND command for small page NAND devices (512)
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*/
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static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
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{
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struct nand_chip *this = mtd->priv;
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int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
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if (this->dev_ready)
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while (!this->dev_ready(mtd))
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;
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else
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CONFIG_SYS_NAND_READ_DELAY;
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/* Begin command latch cycle */
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this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
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/* Set ALE and clear CLE to start address cycle */
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/* Column address */
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this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
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this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
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this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
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NAND_CTRL_ALE); /* A[24:17] */
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#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
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/* One more address cycle for devices > 32MiB */
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this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
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NAND_CTRL_ALE); /* A[28:25] */
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#endif
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/* Latch in address */
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this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
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/*
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* Wait a while for the data to be ready
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*/
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if (this->dev_ready)
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while (!this->dev_ready(mtd))
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;
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else
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CONFIG_SYS_NAND_READ_DELAY;
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return 0;
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}
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#else
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/*
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* NAND command for large page NAND devices (2k)
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*/
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static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
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{
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struct nand_chip *this = mtd->priv;
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int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
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if (this->dev_ready)
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while (!this->dev_ready(mtd))
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;
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else
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CONFIG_SYS_NAND_READ_DELAY;
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/* Emulate NAND_CMD_READOOB */
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if (cmd == NAND_CMD_READOOB) {
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offs += CONFIG_SYS_NAND_PAGE_SIZE;
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cmd = NAND_CMD_READ0;
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}
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/* Begin command latch cycle */
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this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
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/* Set ALE and clear CLE to start address cycle */
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/* Column address */
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this->cmd_ctrl(mtd, offs & 0xff,
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NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
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this->cmd_ctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
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/* Row address */
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this->cmd_ctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
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this->cmd_ctrl(mtd, ((page_addr >> 8) & 0xff),
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NAND_CTRL_ALE); /* A[27:20] */
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#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
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/* One more address cycle for devices > 128MiB */
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this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
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NAND_CTRL_ALE); /* A[31:28] */
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#endif
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/* Latch in address */
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this->cmd_ctrl(mtd, NAND_CMD_READSTART,
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NAND_CTRL_CLE | NAND_CTRL_CHANGE);
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this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
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/*
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* Wait a while for the data to be ready
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*/
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if (this->dev_ready)
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while (!this->dev_ready(mtd))
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;
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else
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CONFIG_SYS_NAND_READ_DELAY;
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return 0;
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}
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#endif
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static int nand_is_bad_block(struct mtd_info *mtd, int block)
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{
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struct nand_chip *this = mtd->priv;
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nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
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/*
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* Read one byte
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*/
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if (readb(this->IO_ADDR_R) != 0xff)
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return 1;
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return 0;
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}
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static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
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{
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struct nand_chip *this = mtd->priv;
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u_char *ecc_calc;
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u_char *ecc_code;
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u_char *oob_data;
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int i;
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int eccsize = CONFIG_SYS_NAND_ECCSIZE;
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int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
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int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
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uint8_t *p = dst;
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int stat;
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nand_command(mtd, block, page, 0, NAND_CMD_READ0);
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/* No malloc available for now, just use some temporary locations
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* in SDRAM
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*/
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ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
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ecc_code = ecc_calc + 0x100;
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oob_data = ecc_calc + 0x200;
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for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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this->ecc.hwctl(mtd, NAND_ECC_READ);
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this->read_buf(mtd, p, eccsize);
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this->ecc.calculate(mtd, p, &ecc_calc[i]);
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}
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this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
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/* Pick the ECC bytes out of the oob data */
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for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
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ecc_code[i] = oob_data[nand_ecc_pos[i]];
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eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
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p = dst;
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for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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/* No chance to do something with the possible error message
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* from correct_data(). We just hope that all possible errors
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* are corrected by this routine.
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*/
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stat = this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
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}
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return 0;
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}
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static int nand_load(struct mtd_info *mtd, unsigned int offs,
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unsigned int uboot_size, uchar *dst)
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{
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unsigned int block, lastblock;
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unsigned int page;
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/*
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* offs has to be aligned to a page address!
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*/
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block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
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lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
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page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
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while (block <= lastblock) {
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if (!nand_is_bad_block(mtd, block)) {
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/*
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* Skip bad blocks
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*/
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while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
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nand_read_page(mtd, block, page, dst);
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dst += CONFIG_SYS_NAND_PAGE_SIZE;
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page++;
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}
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page = 0;
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} else {
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lastblock++;
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}
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block++;
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}
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return 0;
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}
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#if defined(CONFIG_ARM) && !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
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void board_init_f (ulong bootflag)
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{
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relocate_code (TEXT_BASE - TOTAL_MALLOC_LEN, NULL, TEXT_BASE);
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}
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#endif
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/*
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* The main entry for NAND booting. It's necessary that SDRAM is already
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* configured and available since this code loads the main U-Boot image
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* from NAND into SDRAM and starts it from there.
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*/
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void nand_boot(void)
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{
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struct nand_chip nand_chip;
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nand_info_t nand_info;
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int ret;
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__attribute__((noreturn)) void (*uboot)(void);
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/*
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* Init board specific nand support
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*/
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nand_info.priv = &nand_chip;
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nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
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nand_chip.dev_ready = NULL; /* preset to NULL */
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board_nand_init(&nand_chip);
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if (nand_chip.select_chip)
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nand_chip.select_chip(&nand_info, 0);
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/*
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* Load U-Boot image from NAND into RAM
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*/
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ret = nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
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(uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
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#ifdef CONFIG_NAND_ENV_DST
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nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
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(uchar *)CONFIG_NAND_ENV_DST);
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#ifdef CONFIG_ENV_OFFSET_REDUND
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nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
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(uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
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#endif
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#endif
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if (nand_chip.select_chip)
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nand_chip.select_chip(&nand_info, -1);
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/*
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* Jump to U-Boot image
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*/
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uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
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(*uboot)();
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}
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