mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-07 05:13:21 +09:00
![Sjoerd Simons](/assets/img/avatar_default.png)
When malloc_base initially gets setup in the SPL it is based on the
current (early) stack pointer, which for rockchip is pointing into SRAM.
This means simple memory allocations happen in SRAM space, which is
somewhat unfortunate. Specifically a bounce buffer for the mmc allocated
in SRAM space seems to cause the mmc engine to stall/fail causing
timeouts and a failure to load the main u-boot image.
To resolve this, reconfigure the malloc_base to start at the relocated
stack pointer after DRAM has been setup.
For reference, things did work fine on rockchip before 596380db
was
merged to fix memalign_simple due to a combination of rockchip SDRAM
starting at address 0 and the dw_mmc driver not checking errors from
bounce_buffer_start. As a result, when a bounce buffer needed to be
allocated mem_align simple would fail and return NULL. The mmc driver
ignored the error and happily continued with the bounce buffer address
being set to 0, which just happened to work fine..
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
295 lines
5.8 KiB
C
295 lines
5.8 KiB
C
/*
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* (C) Copyright 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <led.h>
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#include <malloc.h>
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#include <ram.h>
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#include <spl.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/periph.h>
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#include <asm/arch/sdram.h>
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#include <dm/pinctrl.h>
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#include <dm/root.h>
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#include <dm/test.h>
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#include <dm/util.h>
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#include <power/regulator.h>
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DECLARE_GLOBAL_DATA_PTR;
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u32 spl_boot_device(void)
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{
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const void *blob = gd->fdt_blob;
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struct udevice *dev;
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const char *bootdev;
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int node;
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int ret;
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bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
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debug("Boot device %s\n", bootdev);
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if (!bootdev)
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goto fallback;
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node = fdt_path_offset(blob, bootdev);
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if (node < 0) {
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debug("node=%d\n", node);
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goto fallback;
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}
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ret = device_get_global_by_of_offset(node, &dev);
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if (ret) {
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debug("device at node %s/%d not found: %d\n", bootdev, node,
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ret);
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goto fallback;
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}
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debug("Found device %s\n", dev->name);
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switch (device_get_uclass_id(dev)) {
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case UCLASS_SPI_FLASH:
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return BOOT_DEVICE_SPI;
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case UCLASS_MMC:
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return BOOT_DEVICE_MMC1;
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default:
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debug("Booting from device uclass '%s' not supported\n",
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dev_get_uclass_name(dev));
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}
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fallback:
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return BOOT_DEVICE_MMC1;
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}
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u32 spl_boot_mode(void)
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{
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return MMCSD_MODE_RAW;
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}
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/* read L2 control register (L2CTLR) */
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static inline uint32_t read_l2ctlr(void)
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{
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uint32_t val = 0;
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asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val));
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return val;
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}
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/* write L2 control register (L2CTLR) */
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static inline void write_l2ctlr(uint32_t val)
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{
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/*
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* Note: L2CTLR can only be written when the L2 memory system
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* is idle, ie before the MMU is enabled.
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*/
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asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory");
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isb();
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}
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static void configure_l2ctlr(void)
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{
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uint32_t l2ctlr;
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l2ctlr = read_l2ctlr();
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l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
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/*
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* Data RAM write latency: 2 cycles
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* Data RAM read latency: 2 cycles
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* Data RAM setup latency: 1 cycle
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* Tag RAM write latency: 1 cycle
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* Tag RAM read latency: 1 cycle
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* Tag RAM setup latency: 1 cycle
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*/
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l2ctlr |= (1 << 3 | 1 << 0);
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write_l2ctlr(l2ctlr);
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}
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struct rk3288_timer {
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u32 timer_load_count0;
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u32 timer_load_count1;
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u32 timer_curr_value0;
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u32 timer_curr_value1;
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u32 timer_ctrl_reg;
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u32 timer_int_status;
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};
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void init_timer(void)
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{
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struct rk3288_timer * const timer7_ptr = (void *)TIMER7_BASE;
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writel(0xffffffff, &timer7_ptr->timer_load_count0);
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writel(0xffffffff, &timer7_ptr->timer_load_count1);
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writel(1, &timer7_ptr->timer_ctrl_reg);
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}
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static int configure_emmc(struct udevice *pinctrl)
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{
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struct gpio_desc desc;
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int ret;
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pinctrl_request_noflags(pinctrl, PERIPH_ID_EMMC);
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/*
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* TODO(sjg@chromium.org): Pick this up from device tree or perhaps
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* use the EMMC_PWREN setting.
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*/
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ret = dm_gpio_lookup_name("D9", &desc);
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if (ret) {
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debug("gpio ret=%d\n", ret);
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return ret;
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}
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ret = dm_gpio_request(&desc, "emmc_pwren");
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if (ret) {
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debug("gpio_request ret=%d\n", ret);
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return ret;
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}
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ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
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if (ret) {
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debug("gpio dir ret=%d\n", ret);
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return ret;
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}
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ret = dm_gpio_set_value(&desc, 1);
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if (ret) {
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debug("gpio value ret=%d\n", ret);
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return ret;
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}
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return 0;
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}
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void board_init_f(ulong dummy)
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{
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struct udevice *pinctrl;
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struct udevice *dev;
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int ret;
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/* Example code showing how to enable the debug UART on RK3288 */
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#ifdef EARLY_UART
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#include <asm/arch/grf_rk3288.h>
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/* Enable early UART on the RK3288 */
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#define GRF_BASE 0xff770000
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struct rk3288_grf * const grf = (void *)GRF_BASE;
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rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
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GPIO7C6_MASK << GPIO7C6_SHIFT,
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GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
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GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
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/*
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* Debug UART can be used from here if required:
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*
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* debug_uart_init();
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* printch('a');
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* printhex8(0x1234);
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* printascii("string");
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*/
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debug_uart_init();
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#endif
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ret = spl_init();
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if (ret) {
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debug("spl_init() failed: %d\n", ret);
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hang();
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}
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init_timer();
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configure_l2ctlr();
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ret = uclass_get_device(UCLASS_CLK, 0, &dev);
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if (ret) {
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debug("CLK init failed: %d\n", ret);
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return;
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}
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
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if (ret) {
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debug("Pinctrl init failed: %d\n", ret);
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return;
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}
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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debug("DRAM init failed: %d\n", ret);
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return;
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}
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/*
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* Now that DRAM is initialized setup base pointer for simple malloc
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* into RAM.
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*/
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gd->malloc_base = CONFIG_SPL_STACK_R_ADDR;
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gd->malloc_ptr = 0;
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}
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static int setup_led(void)
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{
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#ifdef CONFIG_SPL_LED
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struct udevice *dev;
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char *led_name;
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int ret;
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led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
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if (!led_name)
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return 0;
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ret = led_get_by_label(led_name, &dev);
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if (ret) {
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debug("%s: get=%d\n", __func__, ret);
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return ret;
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}
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ret = led_set_on(dev, 1);
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if (ret)
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return ret;
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#endif
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return 0;
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}
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void spl_board_init(void)
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{
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struct udevice *pinctrl;
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int ret;
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ret = setup_led();
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if (ret) {
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debug("LED ret=%d\n", ret);
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hang();
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}
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
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if (ret) {
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debug("%s: Cannot find pinctrl device\n", __func__);
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goto err;
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}
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ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
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if (ret) {
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debug("%s: Failed to set up SD card\n", __func__);
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goto err;
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}
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ret = configure_emmc(pinctrl);
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if (ret) {
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debug("%s: Failed to set up eMMC\n", __func__);
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goto err;
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}
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/* Enable debug UART */
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ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
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if (ret) {
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debug("%s: Failed to set up console UART\n", __func__);
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goto err;
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}
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preloader_console_init();
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return;
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err:
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printf("spl_board_init: Error %d\n", ret);
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/* No way to report error here */
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hang();
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}
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