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![Peng Fan](/assets/img/avatar_default.png)
Drop CONFIG_LPUART_32B_REG. Move the register structure to a common file include/fsl_lpuart.h Define lpuart_serial_platdata structure which includes the reg base and flags. For 32Bit register access, use lpuart_read32/lpuart_write32 which handles big/little endian. For 8Bit register access, still use the orignal code. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: York Sun <york.sun@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@nxp.com> Cc: Alison Wang <b18965@freescale.com>
30 lines
518 B
C
30 lines
518 B
C
/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARCH_CLOCK_H
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#define __ASM_ARCH_CLOCK_H
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#include <common.h>
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enum mxc_clock {
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MXC_ARM_CLK = 0,
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MXC_BUS_CLK,
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MXC_IPG_CLK,
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MXC_UART_CLK,
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MXC_ESDHC_CLK,
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MXC_FEC_CLK,
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MXC_I2C_CLK,
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MXC_DSPI_CLK,
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};
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void enable_ocotp_clk(unsigned char enable);
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unsigned int mxc_get_clock(enum mxc_clock clk);
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u32 get_lpuart_clk(void);
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#define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK)
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#endif /* __ASM_ARCH_CLOCK_H */
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