mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
008a610b4c
Most Rockchip socs have the ability to either map the bootrom or a sram area to the starting address of the cpu by flipping a bit in the GRF. Newer socs leave this untouched and mapped to the bootrom but the legacy loaders on rk3188 and before enabled the remap functionality and the current smp implementation in the Linux kernel also requires it to be enabled, to bring up secondary cpus. So to keep smp working in the kernel, mimic the behaviour of the legacy bootloaders and enable the remap functionality. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
104 lines
2.0 KiB
C
104 lines
2.0 KiB
C
/*
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* (C) Copyright 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <ram.h>
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#include <syscon.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/grf_rk3188.h>
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#include <asm/arch/periph.h>
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#include <asm/arch/pmu_rk3288.h>
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#include <asm/arch/boot_mode.h>
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#include <asm/gpio.h>
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#include <dm/pinctrl.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_late_init(void)
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{
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struct rk3188_grf *grf;
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grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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if (IS_ERR(grf)) {
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error("grf syscon returned %ld\n", PTR_ERR(grf));
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} else {
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/* enable noc remap to mimic legacy loaders */
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rk_clrsetreg(&grf->soc_con0,
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NOC_REMAP_MASK << NOC_REMAP_SHIFT,
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NOC_REMAP_MASK << NOC_REMAP_SHIFT);
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}
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return 0;
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}
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int board_init(void)
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{
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#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
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struct udevice *pinctrl;
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int ret;
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/*
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* We need to implement sdcard iomux here for the further
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* initialization, otherwise, it'll hit sdcard command sending
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* timeout exception.
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*/
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
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if (ret) {
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debug("%s: Cannot find pinctrl device\n", __func__);
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goto err;
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}
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ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
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if (ret) {
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debug("%s: Failed to set up SD card\n", __func__);
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goto err;
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}
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return 0;
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err:
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printf("board_init: Error %d\n", ret);
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/* No way to report error here */
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hang();
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return -1;
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#else
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return 0;
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#endif
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}
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int dram_init(void)
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{
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struct ram_info ram;
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struct udevice *dev;
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int ret;
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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debug("DRAM init failed: %d\n", ret);
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return ret;
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}
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ret = ram_get_info(dev, &ram);
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if (ret) {
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debug("Cannot get DRAM size: %d\n", ret);
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return ret;
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}
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debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
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gd->ram_size = ram.size;
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return 0;
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}
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#ifndef CONFIG_SYS_DCACHE_OFF
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void enable_caches(void)
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{
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/* Enable D-cache. I-cache is already enabled in start.S */
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dcache_enable();
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}
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#endif
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