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https://github.com/brain-hackers/u-boot-brain
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cbff9f80ce
Synchronize DTs with mainline Linux 4.19.6 , commit 96db90800c06d3fe3fa08eb6222fe201286bb778 Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
27 lines
738 B
C
27 lines
738 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2018 Renesas Electronics Corp.
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*/
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#ifndef __DT_BINDINGS_POWER_R8A77990_SYSC_H__
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#define __DT_BINDINGS_POWER_R8A77990_SYSC_H__
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/*
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* These power domain indices match the numbers of the interrupt bits
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* representing the power areas in the various Interrupt Registers
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* (e.g. SYSCISR, Interrupt Status Register)
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*/
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#define R8A77990_PD_CA53_CPU0 5
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#define R8A77990_PD_CA53_CPU1 6
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#define R8A77990_PD_CR7 13
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#define R8A77990_PD_A3VC 14
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#define R8A77990_PD_3DG_A 17
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#define R8A77990_PD_3DG_B 18
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#define R8A77990_PD_CA53_SCU 21
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#define R8A77990_PD_A2VC1 26
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/* Always-on power area */
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#define R8A77990_PD_ALWAYS_ON 32
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#endif /* __DT_BINDINGS_POWER_R8A77990_SYSC_H__ */
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