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https://github.com/brain-hackers/u-boot-brain
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3529596442
Add platform code and DTs for Renesas RZ/A1 R7S72100 SoC. Distinguishing feature of this SoC is that it has up to 10 MiB of on-SoC static RAM (SRAM). The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
19 lines
522 B
C
19 lines
522 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Defines macros and constants for Renesas RZ/A1 pin controller pin
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* muxing functions.
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*/
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#ifndef __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H
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#define __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H
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#define RZA1_PINS_PER_PORT 16
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/*
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* Create the pin index from its bank and position numbers and store in
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* the upper 16 bits the alternate function identifier
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*/
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#define RZA1_PINMUX(b, p, f) \
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((b) * RZA1_PINS_PER_PORT + (p) | ((f) << 16))
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#endif /* __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H */
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