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https://github.com/brain-hackers/u-boot-brain
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07d538d281
Add a clock driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>
34 lines
896 B
C
34 lines
896 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2018
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* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
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*/
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#ifndef DT_BINDINGS_MPC83XX_CLK_H
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#define DT_BINDINGS_MPC83XX_CLK_H
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#define MPC83XX_CLK_CORE 0
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#define MPC83XX_CLK_CSB 1
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#define MPC83XX_CLK_QE 2
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#define MPC83XX_CLK_BRG 3
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#define MPC83XX_CLK_LBIU 4
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#define MPC83XX_CLK_LCLK 5
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#define MPC83XX_CLK_MEM 6
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#define MPC83XX_CLK_MEM_SEC 7
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#define MPC83XX_CLK_ENC 8
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#define MPC83XX_CLK_I2C1 9
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#define MPC83XX_CLK_I2C2 10
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#define MPC83XX_CLK_TDM 11
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#define MPC83XX_CLK_SDHC 12
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#define MPC83XX_CLK_TSEC1 13
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#define MPC83XX_CLK_TSEC2 14
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#define MPC83XX_CLK_USBDR 15
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#define MPC83XX_CLK_USBMPH 16
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#define MPC83XX_CLK_PCIEXP1 17
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#define MPC83XX_CLK_PCIEXP2 18
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#define MPC83XX_CLK_SATA 19
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#define MPC83XX_CLK_DMAC 20
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#define MPC83XX_CLK_PCI 21
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/* Count */
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#define MPC83XX_CLK_COUNT 22
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#endif /* DT_BINDINGS_MPC83XX_CLK_H */
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