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https://github.com/brain-hackers/u-boot-brain
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8a8d24bdf1
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
56 lines
1.2 KiB
C
56 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com>
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*/
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#ifndef __SERIAL_PXA_H
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#define __SERIAL_PXA_H
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/*
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* The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can
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* easily handle enabling of clock.
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*/
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#ifdef CONFIG_CPU_MONAHANS
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#define UART_CLK_BASE CKENA_21_BTUART
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#define UART_CLK_REG CKENA
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#define BTUART_INDEX 0
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#define FFUART_INDEX 1
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#define STUART_INDEX 2
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#elif CONFIG_CPU_PXA25X
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#define UART_CLK_BASE BIT(4) /* HWUART */
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#define UART_CLK_REG CKEN
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#define HWUART_INDEX 0
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#define STUART_INDEX 1
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#define FFUART_INDEX 2
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#define BTUART_INDEX 3
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#else /* PXA27x */
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#define UART_CLK_BASE CKEN5_STUART
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#define UART_CLK_REG CKEN
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#define STUART_INDEX 0
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#define FFUART_INDEX 1
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#define BTUART_INDEX 2
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#endif
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/*
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* Only PXA250 has HWUART, to avoid poluting the code with more macros,
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* artificially introduce this.
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*/
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#ifndef CONFIG_CPU_PXA25X
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#define HWUART_INDEX 0xff
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#endif
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/*
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* struct pxa_serial_plat - information about a PXA port
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*
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* @base: Uart port base register address
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* @port: Uart port index, for cpu with pinmux for uart / gpio
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* baudrtatre: Uart port baudrate
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*/
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struct pxa_serial_plat {
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struct pxa_uart_regs *base;
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int port;
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int baudrate;
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};
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#endif /* __SERIAL_PXA_H */
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