250 lines
6.9 KiB
C
250 lines
6.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2011-2012
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* Pali Rohár <pali@kernel.org>
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*
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* (C) Copyright 2010
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* Alistair Buxton <a.j.buxton@gmail.com>
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*
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* Derived from Beagle Board code:
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* (C) Copyright 2006-2008
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* Texas Instruments.
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* Richard Woodruff <r-woodruff2@ti.com>
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* Syed Mohammed Khasim <x0khasim@ti.com>
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*
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* Configuration settings for the Nokia RX-51 aka N900.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
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#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
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#include <asm/arch/cpu.h> /* get chip and board defs */
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#include <asm/arch/omap.h>
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#include <asm/arch/mem.h>
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#include <linux/stringify.h>
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/* Clock Defines */
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#define V_OSCK 26000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK >> 1)
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#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
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#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
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#define CONFIG_INITRD_TAG /* enable passing initrd */
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#define CONFIG_REVISION_TAG /* enable passing revision tag*/
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#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_UBI_SIZE (512 << 10)
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
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(128 << 10))
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/*
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* Hardware drivers
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*/
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/*
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* NS16550 Configuration
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*/
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#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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/*
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* select serial console configuration
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*/
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#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
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#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
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/* USB device configuration */
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#define CONFIG_USB_DEVICE
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#define CONFIG_USB_TTY
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#define CONFIG_USBD_VENDORID 0x0421
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#define CONFIG_USBD_PRODUCTID_CDCACM 0x01c8
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#define CONFIG_USBD_PRODUCTID_GSERIAL 0x01c8
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#define CONFIG_USBD_MANUFACTURER "Nokia"
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#define CONFIG_USBD_PRODUCT_NAME "N900 (U-Boot)"
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#define GPIO_SLIDE 71
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/*
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* Board ONENAND Info.
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*/
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#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
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/* Watchdog support */
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#define CONFIG_HW_WATCHDOG
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/*
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* Framebuffer
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*/
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/* Video console */
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#define CONFIG_VIDEO_LOGO
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#define VIDEO_FB_16BPP_PIXEL_SWAP
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#define VIDEO_FB_16BPP_WORD_SWAP
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/* functions for cfb_console */
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#define VIDEO_KBD_INIT_FCT rx51_kp_init()
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#define VIDEO_TSTC_FCT rx51_kp_tstc
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#define VIDEO_GETC_FCT rx51_kp_getc
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#ifndef __ASSEMBLY__
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struct stdio_dev;
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int rx51_kp_init(void);
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int rx51_kp_tstc(struct stdio_dev *sdev);
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int rx51_kp_getc(struct stdio_dev *sdev);
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#endif
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/* Environment information */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"usbtty=cdc_acm\0" \
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"stdin=usbtty,serial,vga\0" \
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"stdout=usbtty,serial,vga\0" \
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"stderr=usbtty,serial,vga\0" \
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"slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
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"switchmmc=mmc dev ${mmcnum}\0" \
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"kernaddr=0x82008000\0" \
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"initrdaddr=0x84008000\0" \
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"scriptaddr=0x86008000\0" \
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"fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
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"${loadaddr} ${mmcfile}\0" \
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"kernload=setenv loadaddr ${kernaddr};" \
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"setenv mmcfile ${mmckernfile};" \
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"run fileload\0" \
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"initrdload=setenv loadaddr ${initrdaddr};" \
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"setenv mmcfile ${mmcinitrdfile};" \
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"run fileload\0" \
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"scriptload=setenv loadaddr ${scriptaddr};" \
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"setenv mmcfile ${mmcscriptfile};" \
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"run fileload\0" \
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"scriptboot=echo Running ${mmcscriptfile} from mmc " \
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"${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
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"kernboot=echo Booting ${mmckernfile} from mmc " \
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"${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
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"kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
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"${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
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"attachboot=echo Booting attached kernel image ...;" \
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"setenv setup_omap_atag 1;" \
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"bootm ${attkernaddr};" \
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"setenv setup_omap_atag\0" \
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"trymmcscriptboot=if run switchmmc; then " \
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"if run scriptload; then " \
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"run scriptboot;" \
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"fi;" \
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"fi\0" \
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"trymmckernboot=if run switchmmc; then " \
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"if run kernload; then " \
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"run kernboot;" \
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"fi;" \
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"fi\0" \
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"trymmckerninitrdboot=if run switchmmc; then " \
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"if run initrdload; then " \
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"if run kernload; then " \
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"run kerninitrdboot;" \
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"fi;" \
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"fi; " \
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"fi\0" \
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"trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
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"setenv mmckernfile uImage; run trymmckernboot\0" \
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"trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
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"setenv mmcpart 2; run trymmcpartboot;" \
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"setenv mmcpart 3; run trymmcpartboot;" \
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"setenv mmcpart 4; run trymmcpartboot\0" \
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"trymmcboot=if run switchmmc; then " \
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"setenv mmctype fat;" \
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"run trymmcallpartboot;" \
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"setenv mmctype ext4;" \
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"run trymmcallpartboot;" \
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"fi\0" \
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"emmcboot=setenv mmcnum 1; run trymmcboot\0" \
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"sdboot=setenv mmcnum 0; run trymmcboot\0" \
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"preboot=setenv mmcnum 1; setenv mmcpart 1;" \
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"setenv mmcscriptfile bootmenu.scr;" \
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"if run switchmmc; then " \
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"setenv mmctype fat;" \
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"if run scriptload; then run scriptboot; else " \
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"setenv mmctype ext4;" \
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"if run scriptload; then run scriptboot; fi;" \
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"fi;" \
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"fi;" \
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"if run slide; then true; else " \
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"setenv bootmenu_delay 0;" \
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"setenv bootdelay 0;" \
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"fi\0" \
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"menucmd=bootmenu\0" \
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"bootmenu_0=Attached kernel=run attachboot\0" \
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"bootmenu_1=Internal eMMC=run emmcboot\0" \
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"bootmenu_2=External SD card=run sdboot\0" \
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"bootmenu_3=U-Boot boot order=boot\0" \
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"bootmenu_delay=30\0" \
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""
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#define CONFIG_POSTBOOTMENU \
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"echo;" \
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"echo Extra commands:;" \
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"echo run sdboot - Boot from SD card slot.;" \
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"echo run emmcboot - Boot internal eMMC memory.;" \
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"echo run attachboot - Boot attached kernel image.;" \
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"echo"
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#define CONFIG_BOOTCOMMAND \
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"run sdboot;" \
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"run emmcboot;" \
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"run attachboot;" \
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"echo"
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/* default load address */
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#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
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/*
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* OMAP3 has 12 GP timers, they can be driven by the system clock
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* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
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* This rate is divided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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/*
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* Physical Memory Map
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*/
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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/*
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
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#define CONFIG_SYS_INIT_RAM_SIZE 0x800
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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/*
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* Attached kernel image
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*/
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#define SDRAM_SIZE 0x10000000 /* 256 MB */
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#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
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#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
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#define KERNEL_OFFSET 0x40000 /* 256 kB */
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#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
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#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
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/* Reserve protected RAM for attached kernel */
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#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
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#endif /* __CONFIG_H */
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