47 lines
1.1 KiB
C
47 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
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*
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* Author: Weijie Gao <weijie.gao@mediatek.com>
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*/
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#ifndef __CONFIG_MT7620_H
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#define __CONFIG_MT7620_H
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_MALLOC_LEN 0x100000
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#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_LOAD_ADDR 0x80010000
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#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
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#define CONFIG_SYS_BOOTM_LEN 0x1000000
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_CBSIZE 1024
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/* Serial common */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/* SPL */
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#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SPL_BSS_START_ADDR 0x80010000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x10000
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#define CONFIG_SPL_MAX_SIZE 0x10000
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#define CONFIG_SPL_PAD_TO 0
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/* Dummy value */
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#define CONFIG_SYS_UBOOT_BASE 0
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#endif /* __CONFIG_MT7620_H */
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