mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
151 lines
4.5 KiB
C
151 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* MUSB OTG driver DMA controller abstraction
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*
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* Copyright 2005 Mentor Graphics Corporation
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* Copyright (C) 2005-2006 by Texas Instruments
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* Copyright (C) 2006-2007 Nokia Corporation
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*/
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#ifndef __MUSB_DMA_H__
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#define __MUSB_DMA_H__
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struct musb_hw_ep;
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/*
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* DMA Controller Abstraction
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*
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* DMA Controllers are abstracted to allow use of a variety of different
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* implementations of DMA, as allowed by the Inventra USB cores. On the
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* host side, usbcore sets up the DMA mappings and flushes caches; on the
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* peripheral side, the gadget controller driver does. Responsibilities
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* of a DMA controller driver include:
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*
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* - Handling the details of moving multiple USB packets
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* in cooperation with the Inventra USB core, including especially
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* the correct RX side treatment of short packets and buffer-full
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* states (both of which terminate transfers).
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*
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* - Knowing the correlation between dma channels and the
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* Inventra core's local endpoint resources and data direction.
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*
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* - Maintaining a list of allocated/available channels.
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*
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* - Updating channel status on interrupts,
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* whether shared with the Inventra core or separate.
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*/
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#define DMA_ADDR_INVALID (~(dma_addr_t)0)
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#ifndef CONFIG_USB_MUSB_PIO_ONLY
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#define is_dma_capable() (1)
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#else
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#define is_dma_capable() (0)
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#endif
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#ifdef CONFIG_USB_TI_CPPI_DMA
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#define is_cppi_enabled() 1
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#else
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#define is_cppi_enabled() 0
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#endif
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#ifdef CONFIG_USB_TUSB_OMAP_DMA
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#define tusb_dma_omap() 1
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#else
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#define tusb_dma_omap() 0
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#endif
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/*
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* DMA channel status ... updated by the dma controller driver whenever that
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* status changes, and protected by the overall controller spinlock.
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*/
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enum dma_channel_status {
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/* unallocated */
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MUSB_DMA_STATUS_UNKNOWN,
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/* allocated ... but not busy, no errors */
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MUSB_DMA_STATUS_FREE,
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/* busy ... transactions are active */
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MUSB_DMA_STATUS_BUSY,
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/* transaction(s) aborted due to ... dma or memory bus error */
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MUSB_DMA_STATUS_BUS_ABORT,
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/* transaction(s) aborted due to ... core error or USB fault */
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MUSB_DMA_STATUS_CORE_ABORT
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};
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struct dma_controller;
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/**
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* struct dma_channel - A DMA channel.
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* @private_data: channel-private data
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* @max_len: the maximum number of bytes the channel can move in one
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* transaction (typically representing many USB maximum-sized packets)
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* @actual_len: how many bytes have been transferred
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* @status: current channel status (updated e.g. on interrupt)
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* @desired_mode: true if mode 1 is desired; false if mode 0 is desired
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*
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* channels are associated with an endpoint for the duration of at least
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* one usb transfer.
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*/
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struct dma_channel {
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void *private_data;
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/* FIXME not void* private_data, but a dma_controller * */
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size_t max_len;
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size_t actual_len;
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enum dma_channel_status status;
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bool desired_mode;
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};
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/*
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* dma_channel_status - return status of dma channel
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* @c: the channel
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*
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* Returns the software's view of the channel status. If that status is BUSY
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* then it's possible that the hardware has completed (or aborted) a transfer,
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* so the driver needs to update that status.
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*/
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static inline enum dma_channel_status
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dma_channel_status(struct dma_channel *c)
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{
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return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
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}
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/**
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* struct dma_controller - A DMA Controller.
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* @start: call this to start a DMA controller;
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* return 0 on success, else negative errno
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* @stop: call this to stop a DMA controller
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* return 0 on success, else negative errno
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* @channel_alloc: call this to allocate a DMA channel
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* @channel_release: call this to release a DMA channel
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* @channel_abort: call this to abort a pending DMA transaction,
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* returning it to FREE (but allocated) state
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*
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* Controllers manage dma channels.
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*/
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struct dma_controller {
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int (*start)(struct dma_controller *);
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int (*stop)(struct dma_controller *);
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struct dma_channel *(*channel_alloc)(struct dma_controller *,
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struct musb_hw_ep *, u8 is_tx);
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void (*channel_release)(struct dma_channel *);
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int (*channel_program)(struct dma_channel *channel,
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u16 maxpacket, u8 mode,
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dma_addr_t dma_addr,
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u32 length);
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int (*channel_abort)(struct dma_channel *);
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int (*is_compatible)(struct dma_channel *channel,
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u16 maxpacket,
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void *buf, u32 length);
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};
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/* called after channel_program(), may indicate a fault */
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extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);
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extern struct dma_controller *__init
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dma_controller_create(struct musb *, void __iomem *);
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extern void dma_controller_destroy(struct dma_controller *);
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#endif /* __MUSB_DMA_H__ */
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