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This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot repository. It currently supports DDR4 on Octeon 3. It can be later extended to support also DDR3 and Octeon 2 platforms. Part 3 includes the DIMM SPD handling code and the Kconfig / Makefile integration. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
9 lines
195 B
Makefile
9 lines
195 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Copyright (c) 2020 Marvell, Inc.
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#
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obj-$(CONFIG_RAM_OCTEON_DDR4) += octeon_ddr.o
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obj-$(CONFIG_RAM_OCTEON_DDR4) += octeon3_lmc.o
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obj-y += dimm_spd_eeprom.o
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