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https://github.com/brain-hackers/u-boot-brain
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3a187cff7a
LX2162 is LX2160 based SoC, it has same die as of LX2160 with different packaging. LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module, microSD card, eMMC support, serial console, qspi nor flash, qsgmii, sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes interface to support three PCIe gen3 interface. Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> [Fixed whitespace errors] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
38 lines
900 B
Plaintext
38 lines
900 B
Plaintext
#
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# NXP Management Complex
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#
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menuconfig FSL_MC_ENET
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bool "NXP Management Complex"
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depends on ARCH_LS2080A || ARCH_LS1088A || ARCH_LX2160A || ARCH_LX2162A
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default y
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select RESV_RAM
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help
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Enable Management Complex (MC) network
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This is NXP Management Complex menuconfig
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that contains all MC related config options
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if FSL_MC_ENET
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config SYS_MC_RSV_MEM_ALIGN
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hex "Management Complex reserved memory alignment"
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depends on RESV_RAM
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default 0x20000000 if ARCH_LS2080A || ARCH_LS1088A || ARCH_LX2160A || ARCH_LX2162A
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help
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Reserved memory needs to be aligned for MC to use. Default value
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is 512MB.
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config MC_DRAM_SPB_OFFSET
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hex "Soft Parser SPB DRAM offset"
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default 0x00F40000
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help
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Set the DRAM offset for Soft Parser Blob.
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config MC_SPB_MAX_SIZE
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hex "Soft Parser SPB maximum size"
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default 0x00020000
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help
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Set the maximum size for Soft Parser Blob.
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endif # FSL_MC_ENET
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