mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
691d719db7
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
57 lines
1.2 KiB
C
57 lines
1.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2019 Vasily Khoruzhick <anarsoul@gmail.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <init.h>
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#include <syscon.h>
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#include <asm/io.h>
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#include <asm/arch-rockchip/clock.h>
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#include <asm/arch-rockchip/grf_rk3399.h>
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#include <asm/arch-rockchip/hardware.h>
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#include <asm/arch-rockchip/misc.h>
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#define GRF_IO_VSEL_BT565_SHIFT 0
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#define PMUGRF_CON0_VSEL_SHIFT 8
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#ifdef CONFIG_MISC_INIT_R
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static void setup_iodomain(void)
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{
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struct rk3399_grf_regs *grf =
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syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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struct rk3399_pmugrf_regs *pmugrf =
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syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
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/* BT565 is in 1.8v domain */
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rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
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/* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
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rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
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}
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int misc_init_r(void)
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{
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const u32 cpuid_offset = 0x7;
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const u32 cpuid_length = 0x10;
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u8 cpuid[cpuid_length];
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int ret;
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setup_iodomain();
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ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
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if (ret)
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return ret;
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ret = rockchip_cpuid_set(cpuid, cpuid_length);
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if (ret)
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return ret;
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ret = rockchip_setup_macaddr();
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return ret;
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}
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#endif
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