mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
64413e1b7c
This patch adds Microchip MPFS Icicle Kit support. For now, only NS16550 Serial, Microchip clock, Cadence eMMC and MACB drivers are enabled. The Microchip MPFS Icicle defconfig by default builds U-Boot for S-Mode because U-Boot on Microchip PolarFire SoC will run in S-Mode as payload of HSS + OpenSBI. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
50 lines
820 B
Plaintext
50 lines
820 B
Plaintext
if TARGET_MICROCHIP_ICICLE
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config SYS_BOARD
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default "mpfs_icicle"
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config SYS_VENDOR
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default "microchip"
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config SYS_CPU
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default "generic"
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config SYS_CONFIG_NAME
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default "microchip_mpfs_icicle"
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config SYS_TEXT_BASE
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default 0x80000000 if !RISCV_SMODE
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default 0x80200000 if RISCV_SMODE
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select GENERIC_RISCV
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select BOARD_EARLY_INIT_F
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select BOARD_LATE_INIT
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imply SMP
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imply CLK_CCF
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imply CLK_MPFS
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imply SYS_NS16550
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imply CMD_DHCP
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imply CMD_EXT2
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imply CMD_EXT4
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imply CMD_FAT
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imply CMD_FS_GENERIC
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imply CMD_NET
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imply CMD_PING
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imply CMD_MMC
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imply DOS_PARTITION
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imply EFI_PARTITION
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imply IP_DYN
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imply ISO_PARTITION
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imply MACB
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imply MII
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imply PHY_LIB
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imply PHY_VITESSE
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imply MMC
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imply MMC_WRITE
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imply MMC_SDHCI
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imply MMC_SDHCI_CADENCE
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endif
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