mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
401d1c4f5d
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
95 lines
1.9 KiB
C
95 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/global_data.h>
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#include <asm/immap.h>
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#include <asm/io.h>
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#include <linux/delay.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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puts("Board: ");
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puts("Freescale M52277 EVB\n");
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return 0;
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};
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int dram_init(void)
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{
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u32 dramsize;
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#ifdef CONFIG_CF_SBF
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/*
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* Serial Boot: The dram is already initialized in start.S
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* only require to return DRAM size
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*/
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dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
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#else
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sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
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gpio_t *gpio = (gpio_t *)(MMAP_GPIO);
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u32 i;
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dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
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for (i = 0x13; i < 0x20; i++) {
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if (dramsize == (1 << i))
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break;
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}
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i--;
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out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH);
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out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i);
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out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1);
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out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2);
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/* Issue PALL */
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out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
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__asm__("nop");
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/* Issue LEMR */
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out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
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__asm__("nop");
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out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_EMOD);
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__asm__("nop");
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udelay(1000);
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/* Issue PALL */
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out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
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__asm__("nop");
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/* Perform two refresh cycles */
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out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
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__asm__("nop");
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out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
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__asm__("nop");
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out_be32(&sdram->sdcr,
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(CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
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udelay(100);
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#endif
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gd->ram_size = dramsize;
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return 0;
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};
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int testdram(void)
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{
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/* TODO: XXX XXX XXX */
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printf("DRAM test not implemented!\n");
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return (0);
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}
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