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https://github.com/brain-hackers/u-boot-brain
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38e498c3a2
At present write_tables() can fail but does not report this problem to its caller. Fix this by changing the return type. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
68 lines
1.9 KiB
C
68 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*/
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#ifndef _X86_TABLES_H_
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#define _X86_TABLES_H_
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#include <tables_csum.h>
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#define ROM_TABLE_ADDR CONFIG_ROM_TABLE_ADDR
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#define ROM_TABLE_END (CONFIG_ROM_TABLE_ADDR + CONFIG_ROM_TABLE_SIZE - 1)
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#define ROM_TABLE_ALIGN 1024
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/* SeaBIOS expects coreboot tables at address range 0x0000-0x1000 */
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#define CB_TABLE_ADDR 0x800
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/**
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* table_compute_checksum() - Compute a table checksum
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*
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* This computes an 8-bit checksum for the configuration table.
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* All bytes in the configuration table, including checksum itself and
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* reserved bytes must add up to zero.
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*
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* @v: configuration table base address
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* @len: configuration table size
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* @return: the 8-bit checksum
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*/
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u8 table_compute_checksum(void *v, int len);
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/**
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* table_fill_string() - Fill a string with pad in the configuration table
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*
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* This fills a string in the configuration table. It copies number of bytes
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* from the source string, and if source string length is shorter than the
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* required size to copy, pad the table string with the given pad character.
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*
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* @dest: where to fill a string
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* @src: where to copy from
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* @n: number of bytes to copy
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* @pad: character to pad the remaining bytes
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*/
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void table_fill_string(char *dest, const char *src, size_t n, char pad);
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/**
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* write_tables() - Write x86 configuration tables
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*
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* This writes x86 configuration tables, including PIRQ routing table,
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* Multi-Processor table and ACPI table. Whether a specific type of
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* configuration table is written is controlled by a Kconfig option.
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*
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* @return 0 if OK, -ENOSPC if table too large
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*/
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int write_tables(void);
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/**
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* write_pirq_routing_table() - Write PIRQ routing table
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*
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* This writes PIRQ routing table at a given address.
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*
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* @start: start address to write PIRQ routing table
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* @return: end address of PIRQ routing table
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*/
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ulong write_pirq_routing_table(ulong start);
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#endif /* _X86_TABLES_H_ */
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