mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 07:16:04 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
217 lines
4.2 KiB
ArmAsm
217 lines
4.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
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2004, 2005, 2006
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Free Software Foundation, Inc.
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*/
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!! libgcc routines for the Renesas / SuperH SH CPUs.
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!! Contributed by Steve Chamberlain.
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!! sac@cygnus.com
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!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
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!! recoded in assembly by Toshiyasu Morita
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!! tm@netcom.com
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/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
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ELF local label prefixes by J"orn Rennecke
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amylaar@cygnus.com */
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.text
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.balign 4
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.global __movmem
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.global __movstr
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.set __movstr, __movmem
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/* This would be a lot simpler if r6 contained the byte count
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minus 64, and we wouldn't be called here for a byte count of 64. */
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__movmem:
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sts.l pr,@-r15
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shll2 r6
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bsr __movmemSI52+2
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mov.l @(48,r5),r0
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.balign 4
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movmem_loop: /* Reached with rts */
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mov.l @(60,r5),r0
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add #-64,r6
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mov.l r0,@(60,r4)
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tst r6,r6
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mov.l @(56,r5),r0
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bt movmem_done
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mov.l r0,@(56,r4)
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cmp/pl r6
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mov.l @(52,r5),r0
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add #64,r5
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mov.l r0,@(52,r4)
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add #64,r4
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bt __movmemSI52
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! done all the large groups, do the remainder
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! jump to movmem+
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mova __movmemSI4+4,r0
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add r6,r0
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jmp @r0
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movmem_done: ! share slot insn, works out aligned.
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lds.l @r15+,pr
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mov.l r0,@(56,r4)
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mov.l @(52,r5),r0
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rts
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mov.l r0,@(52,r4)
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.balign 4
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.global __movmemSI64
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.global __movstrSI64
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.set __movstrSI64, __movmemSI64
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__movmemSI64:
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mov.l @(60,r5),r0
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mov.l r0,@(60,r4)
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.global __movmemSI60
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.global __movstrSI60
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.set __movstrSI60, __movmemSI60
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__movmemSI60:
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mov.l @(56,r5),r0
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mov.l r0,@(56,r4)
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.global __movmemSI56
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.global __movstrSI56
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.set __movstrSI56, __movmemSI56
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__movmemSI56:
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mov.l @(52,r5),r0
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mov.l r0,@(52,r4)
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.global __movmemSI52
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.global __movstrSI52
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.set __movstrSI52, __movmemSI52
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__movmemSI52:
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mov.l @(48,r5),r0
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mov.l r0,@(48,r4)
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.global __movmemSI48
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.global __movstrSI48
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.set __movstrSI48, __movmemSI48
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__movmemSI48:
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mov.l @(44,r5),r0
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mov.l r0,@(44,r4)
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.global __movmemSI44
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.global __movstrSI44
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.set __movstrSI44, __movmemSI44
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__movmemSI44:
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mov.l @(40,r5),r0
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mov.l r0,@(40,r4)
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.global __movmemSI40
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.global __movstrSI40
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.set __movstrSI40, __movmemSI40
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__movmemSI40:
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mov.l @(36,r5),r0
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mov.l r0,@(36,r4)
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.global __movmemSI36
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.global __movstrSI36
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.set __movstrSI36, __movmemSI36
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__movmemSI36:
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mov.l @(32,r5),r0
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mov.l r0,@(32,r4)
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.global __movmemSI32
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.global __movstrSI32
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.set __movstrSI32, __movmemSI32
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__movmemSI32:
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mov.l @(28,r5),r0
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mov.l r0,@(28,r4)
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.global __movmemSI28
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.global __movstrSI28
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.set __movstrSI28, __movmemSI28
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__movmemSI28:
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mov.l @(24,r5),r0
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mov.l r0,@(24,r4)
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.global __movmemSI24
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.global __movstrSI24
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.set __movstrSI24, __movmemSI24
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__movmemSI24:
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mov.l @(20,r5),r0
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mov.l r0,@(20,r4)
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.global __movmemSI20
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.global __movstrSI20
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.set __movstrSI20, __movmemSI20
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__movmemSI20:
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mov.l @(16,r5),r0
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mov.l r0,@(16,r4)
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.global __movmemSI16
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.global __movstrSI16
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.set __movstrSI16, __movmemSI16
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__movmemSI16:
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mov.l @(12,r5),r0
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mov.l r0,@(12,r4)
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.global __movmemSI12
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.global __movstrSI12
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.set __movstrSI12, __movmemSI12
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__movmemSI12:
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mov.l @(8,r5),r0
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mov.l r0,@(8,r4)
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.global __movmemSI8
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.global __movstrSI8
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.set __movstrSI8, __movmemSI8
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__movmemSI8:
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mov.l @(4,r5),r0
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mov.l r0,@(4,r4)
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.global __movmemSI4
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.global __movstrSI4
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.set __movstrSI4, __movmemSI4
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__movmemSI4:
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mov.l @(0,r5),r0
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rts
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mov.l r0,@(0,r4)
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.global __movmem_i4_even
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.global __movstr_i4_even
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.set __movstr_i4_even, __movmem_i4_even
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.global __movmem_i4_odd
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.global __movstr_i4_odd
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.set __movstr_i4_odd, __movmem_i4_odd
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.global __movmemSI12_i4
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.global __movstrSI12_i4
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.set __movstrSI12_i4, __movmemSI12_i4
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.p2align 5
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L_movmem_2mod4_end:
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mov.l r0,@(16,r4)
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rts
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mov.l r1,@(20,r4)
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.p2align 2
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__movmem_i4_even:
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mov.l @r5+,r0
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bra L_movmem_start_even
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mov.l @r5+,r1
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__movmem_i4_odd:
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mov.l @r5+,r1
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add #-4,r4
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mov.l @r5+,r2
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mov.l @r5+,r3
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mov.l r1,@(4,r4)
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mov.l r2,@(8,r4)
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L_movmem_loop:
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mov.l r3,@(12,r4)
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dt r6
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mov.l @r5+,r0
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bt/s L_movmem_2mod4_end
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mov.l @r5+,r1
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add #16,r4
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L_movmem_start_even:
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mov.l @r5+,r2
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mov.l @r5+,r3
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mov.l r0,@r4
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dt r6
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mov.l r1,@(4,r4)
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bf/s L_movmem_loop
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mov.l r2,@(8,r4)
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rts
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mov.l r3,@(12,r4)
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.p2align 4
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__movmemSI12_i4:
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mov.l @r5,r0
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mov.l @(4,r5),r1
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mov.l @(8,r5),r2
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mov.l r0,@r4
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mov.l r1,@(4,r4)
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rts
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mov.l r2,@(8,r4)
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