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https://github.com/brain-hackers/u-boot-brain
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6020faf62c
Add header files for RISC-V. Cache, ptregs, data type and other definitions are included. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
27 lines
900 B
C
27 lines
900 B
C
/*
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* linux/include/asm-arm/processor.h
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*
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* Copyright (C) 1995-2002 Russell King
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*
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* Copyright (C) 2011 Andes Technology Corporation
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* Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
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* Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
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* Copyright (C) 2017 Rick Chen (rick@andestech.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_RISCV_PROCESSOR_H
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#define __ASM_RISCV_PROCESSOR_H
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/**************************************************************
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* CAUTION:
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* - do not implement for RISCV Arch yet.
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* - so far some files include /asm/processor.h, but
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* no one uses the macros defined in this head file.
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**************************************************************/
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#endif /* __ASM_RISCV_PROCESSOR_H */
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