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https://github.com/brain-hackers/u-boot-brain
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933ada560b
Having WATCHDOG_RESET() called automatically from the timer interrupt runs counter to the idea of a watchdog device - if the board runs into an infinite loops with interrupts still enabled, the watchdog will never fire. When using CONFIG_(SPL_)WDT, the watchdog_reset function is a lot more complicated than just poking a few SOC-specific registers - it involves accessing all kinds of global data, and if the interrupt happens at the wrong time (say, in the middle of an WATCHDOG_RESET() call from ordinary code), that can end up corrupting said global data. Allow the board to opt out of calling WATCHDOG_RESET() from the timer interrupt handler by setting CONFIG_SYS_WATCHDOG_FREQ to 0 - as that setting is currently nonsensical (it would be compile-time divide-by-zero), it cannot affect any existing boards. Add documentation for both the existing and extended meaning of CONFIG_SYS_WATCHDOG_FREQ. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
97 lines
1.9 KiB
C
97 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2003
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* Gleb Natapov <gnatapov@mrv.com>
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*/
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#include <common.h>
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#include <irq_func.h>
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#include <asm/processor.h>
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#include <watchdog.h>
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#ifdef CONFIG_LED_STATUS
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#include <status_led.h>
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#endif
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#include <asm/ptrace.h>
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#ifndef CONFIG_MPC83XX_TIMER
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#ifndef CONFIG_SYS_WATCHDOG_FREQ
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#define CONFIG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2)
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#endif
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static unsigned decrementer_count; /* count value for 1e6/HZ microseconds */
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static __inline__ unsigned long get_dec (void)
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{
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unsigned long val;
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asm volatile ("mfdec %0":"=r" (val):);
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return val;
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}
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static __inline__ void set_dec (unsigned long val)
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{
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if (val)
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asm volatile ("mtdec %0"::"r" (val));
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}
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#endif /* !CONFIG_MPC83XX_TIMER */
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void enable_interrupts(void)
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{
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set_msr (get_msr () | MSR_EE);
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}
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/* returns flag if MSR_EE was set before */
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int disable_interrupts(void)
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{
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ulong msr = get_msr ();
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set_msr (msr & ~MSR_EE);
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return ((msr & MSR_EE) != 0);
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}
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#ifndef CONFIG_MPC83XX_TIMER
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int interrupt_init(void)
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{
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/* call cpu specific function from $(CPU)/interrupts.c */
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interrupt_init_cpu (&decrementer_count);
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set_dec (decrementer_count);
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set_msr (get_msr () | MSR_EE);
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return (0);
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}
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static volatile ulong timestamp = 0;
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void timer_interrupt(struct pt_regs *regs)
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{
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/* call cpu specific function from $(CPU)/interrupts.c */
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timer_interrupt_cpu (regs);
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/* Restore Decrementer Count */
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set_dec (decrementer_count);
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timestamp++;
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#if defined(CONFIG_WATCHDOG) || defined (CONFIG_HW_WATCHDOG)
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if (CONFIG_SYS_WATCHDOG_FREQ && (timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0)
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WATCHDOG_RESET ();
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#endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */
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#ifdef CONFIG_LED_STATUS
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status_led_tick(timestamp);
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#endif /* CONFIG_LED_STATUS */
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}
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ulong get_timer (ulong base)
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{
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return (timestamp - base);
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}
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#endif /* !CONFIG_MPC83XX_TIMER */
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