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https://github.com/brain-hackers/u-boot-brain
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c1a215b455
Pulled in the kmcent2.dts and all its dependents from Linux 5.10, commit 2c85ebc57b3e upstream. Replaced the license text with SPDX License Identifiers. Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
80 lines
1.4 KiB
Plaintext
80 lines
1.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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*/
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mpic: pic@40000 {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <4>;
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reg = <0x40000 0x40000>;
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compatible = "fsl,mpic", "chrp,open-pic";
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device_type = "open-pic";
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clock-frequency = <0x0>;
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};
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timer@41100 {
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compatible = "fsl,mpic-global-timer";
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reg = <0x41100 0x100 0x41300 4>;
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interrupts = <0 0 3 0
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1 0 3 0
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2 0 3 0
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3 0 3 0>;
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};
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msi0: msi@41600 {
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compatible = "fsl,mpic-msi";
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reg = <0x41600 0x200 0x44140 4>;
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msi-available-ranges = <0 0x100>;
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interrupts = <
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0xe0 0 0 0
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0xe1 0 0 0
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0xe2 0 0 0
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0xe3 0 0 0
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0xe4 0 0 0
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0xe5 0 0 0
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0xe6 0 0 0
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0xe7 0 0 0>;
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};
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msi1: msi@41800 {
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compatible = "fsl,mpic-msi";
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reg = <0x41800 0x200 0x45140 4>;
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msi-available-ranges = <0 0x100>;
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interrupts = <
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0xe8 0 0 0
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0xe9 0 0 0
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0xea 0 0 0
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0xeb 0 0 0
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0xec 0 0 0
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0xed 0 0 0
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0xee 0 0 0
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0xef 0 0 0>;
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};
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msi2: msi@41a00 {
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compatible = "fsl,mpic-msi";
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reg = <0x41a00 0x200 0x46140 4>;
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msi-available-ranges = <0 0x100>;
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interrupts = <
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0xf0 0 0 0
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0xf1 0 0 0
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0xf2 0 0 0
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0xf3 0 0 0
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0xf4 0 0 0
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0xf5 0 0 0
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0xf6 0 0 0
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0xf7 0 0 0>;
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};
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timer@42100 {
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compatible = "fsl,mpic-global-timer";
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reg = <0x42100 0x100 0x42300 4>;
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interrupts = <4 0 3 0
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5 0 3 0
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6 0 3 0
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7 0 3 0>;
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};
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