mirror of
https://github.com/brain-hackers/u-boot-brain
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75 lines
1.3 KiB
Plaintext
75 lines
1.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* MPC8379E RDB Device Tree Source
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*
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* Copyright 2020 NXP
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*/
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/dts-v1/;
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/ {
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compatible = "fsl,mpc8379erdb";
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8379@0 {
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device_type = "cpu";
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reg = <0x0>;
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <32768>;
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i-cache-size = <32768>;
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timebase-frequency = <0>;
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bus-frequency = <0>;
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clock-frequency = <0>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x10000000>; // 256MB at 0
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};
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localbus@e0005000 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "fsl,elbc", "simple-bus";
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reg = <0xe0005000 0x1000>;
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interrupts = <77 0x8>;
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interrupt-parent = <&ipic>;
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};
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immr@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "simple-bus";
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ranges = <0 0xe0000000 0x00100000>;
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reg = <0xe0000000 0x00000200>;
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bus-frequency = <0>;
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sdhc@2e000 {
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compatible = "fsl,esdhc";
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reg = <0x2e000 0x1000>;
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bus-width = <0x4>;
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clock-frequency = <0>;
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};
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ipic: interrupt-controller@700 {
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compatible = "fsl,ipic";
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <0x700 0x100>;
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device_type = "ipic";
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};
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};
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};
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