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https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
5d57dfad3f
As the ownership is now Hitachi Power Grids, change the license string and adapt the compatible string in DTS files. For kmeter1.dts we change it to "keymile,KMETER1" for now, as this is then compliant with what is submitted to the linux kernel. All other boards don't have a upstreamed version in linux mainline. Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com> CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com> CC: Heiko Schocher <hs@denx.de> CC: Marek Vasut <marex@denx.de> CC: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
183 lines
4.0 KiB
Plaintext
183 lines
4.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Hitachi Power Grids km836x common ports Device Tree Source
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*
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* Copyright (C) 2020 Heiko Schocher <hs@denx.de>
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*
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*/
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/dts-v1/;
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8360@0 {
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device_type = "cpu";
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reg = <0x0>;
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d-cache-line-size = <32>; /* 32 bytes */
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i-cache-line-size = <32>; /* 32 bytes */
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d-cache-size = <32768>; /* L1, 32K */
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i-cache-size = <32768>; /* L1, 32K */
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timebase-frequency = <0>; /* Filled in by U-Boot */
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bus-frequency = <0>; /* Filled in by U-Boot */
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clock-frequency = <0>; /* Filled in by U-Boot */
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};
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};
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memory {
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device_type = "memory";
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reg = <0 0>; /* Filled in by U-Boot */
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};
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soc: soc8360@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "fsl,mpc8360-immr", "simple-bus";
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ranges = <0x0 0xe0000000 0x00200000>;
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reg = <0xe0000000 0x00000200>;
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bus-frequency = <0>;/* Filled in by U-Boot */
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/* power management control module*/
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pmc: power@b00 {
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compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
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reg = <0xb00 0x100 0xa00 0x100>;
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interrupts = <80 0x8>;
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interrupt-parent = <&ipic>;
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};
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i2c0: i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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compatible = "fsl,mpc8313-i2c","fsl-i2c";
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reg = <0x3000 0x100>;
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interrupts = <14 0x8>;
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interrupt-parent = <&ipic>;
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clock-frequency = <100000>;
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};
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serial0: serial@4500 {
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cell-index = <0>;
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device_type = "serial";
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compatible = "fsl,ns16550", "ns16550";
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reg = <0x4500 0x100>;
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clock-frequency = <264000000>;
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interrupts = <9 0x8>;
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interrupt-parent = <&ipic>;
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status = "disabled";
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};
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serial1: serial@4600 {
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cell-index = <1>;
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device_type = "serial";
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compatible = "fsl,ns16550", "ns16550";
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reg = <0x4600 0x100>;
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clock-frequency = <133333333>;
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interrupts = <10 0x8>;
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interrupt-parent = <&ipic>;
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status = "disabled";
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};
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ipic: pic@700 {
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#address-cells = <0>;
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#interrupt-cells = <2>;
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compatible = "fsl,pq2pro-pic", "fsl,ipic";
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interrupt-controller;
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reg = <0x700 0x100>;
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};
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par_io: par_io@1400 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x1400 0x100>;
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ranges;
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compatible = "fsl,mpc8360-par_io";
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device_type = "par_io";
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num-ports = <7>;
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qe_pio_c: gpio-controller@30 {
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#gpio-cells = <2>;
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compatible = "fsl,mpc8360-qe-pario-bank",
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"fsl,mpc8323-qe-pario-bank";
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reg = <0x1430 0x18>;
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gpio-controller;
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};
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};
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qe: qe@100000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,qe";
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ranges = <0x0 0x100000 0x100000>;
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reg = <0x100000 0x480>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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brg-frequency = <0>; /* Filled in by U-Boot */
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bus-frequency = <0>; /* Filled in by U-Boot */
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muram@10000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,qe-muram", "fsl,cpm-muram";
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ranges = <0x0 0x00010000 0x0000c000>;
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data-only@0 {
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compatible = "fsl,qe-muram-data",
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"fsl,cpm-muram-data";
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reg = <0x0 0xc000>;
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};
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};
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qeic: interrupt-controller@80 {
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interrupt-controller;
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compatible = "fsl,qe-ic";
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#address-cells = <0>;
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#interrupt-cells = <1>;
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reg = <0x80 0x80>;
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big-endian;
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interrupts = <
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32 0x8 /* ucc1 */
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33 0x8 /* ucc2 */
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34 0x8 /* ucc3 */
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35 0x8 /* ucc4 */
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40 0x8 /* ucc1 */
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>;
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interrupt-parent = <&ipic>;
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};
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spi0: spi@4c0 {
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cell-index = <0>;
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compatible = "fsl,spi";
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reg = <0x4c0 0x40>;
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interrupts = <2>;
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interrupt-parent = <&qeic>;
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mode = "qe";
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#address-cells = <1>;
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#size-cells = <0>;
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pio-handle = <&pio_spi>;
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};
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bootcount@0x1bff8 {
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device_type = "bootcount";
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compatible = "u-boot,bootcount";
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reg = <0x1bff8 0x08>;
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};
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};
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};
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localbus: localbus@e0005000 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
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"simple-bus";
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reg = <0xe0005000 0xd8>;
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};
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};
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#include "km836x-uboot.dtsi"
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