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https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
6242aa1374
Make use of device model & device tree to probe the UART driver. This is the initial step in bringing Malta up to date with driver model, and allows for cleaner handling of the different I/O addresses for different system controllers by specifying the ISA bus address instead of a translated memory address. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
33 lines
515 B
Plaintext
33 lines
515 B
Plaintext
/dts-v1/;
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/memreserve/ 0x00000000 0x00001000; /* Exception vectors */
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/memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mti,malta";
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chosen {
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stdout-path = &uart0;
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};
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isa@0 {
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compatible = "isa";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <1 0 0 0x1000>;
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uart0: serial@3f8 {
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compatible = "ns16550a";
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reg = <1 0x3f8 0x40>;
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reg-shift = <0>;
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clock-frequency = <1843200>;
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u-boot,dm-pre-reloc;
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};
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};
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};
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