157 lines
2.3 KiB
Plaintext
157 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2018 Microsemi Corporation
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*/
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/dts-v1/;
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#include "mscc,luton.dtsi"
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/ {
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model = "Luton10 PCB091 Reference Board";
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compatible = "mscc,luton-pcb091", "mscc,luton";
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aliases {
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serial0 = &uart0;
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spi0 = &spi0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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gpio-leds {
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compatible = "gpio-leds";
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top_dimmer {
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label = "pcb091:top:dimmer";
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gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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status_green {
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label = "pcb091:green:status";
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gpios = <&sgpio 26 GPIO_ACTIVE_HIGH>; /* p26.0 */
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default-state = "on";
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};
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status_red {
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label = "pcb091:red:status";
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gpios = <&sgpio 58 GPIO_ACTIVE_HIGH>; /* p26.1 */
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default-state = "off";
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};
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};
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};
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&sgpio {
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status = "okay";
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mscc,sgpio-ports = <0xFFF000FF>;
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};
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&uart0 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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spi-flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <18000000>; /* input clock */
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reg = <0>; /* CS0 */
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spi-cs-high;
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};
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};
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&mdio0 {
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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phy2: ethernet-phy@2 {
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reg = <2>;
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};
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phy3: ethernet-phy@3 {
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reg = <3>;
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};
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phy4: ethernet-phy@4 {
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reg = <4>;
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};
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phy5: ethernet-phy@5 {
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reg = <5>;
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};
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phy6: ethernet-phy@6 {
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reg = <6>;
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};
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phy7: ethernet-phy@7 {
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reg = <7>;
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};
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phy8: ethernet-phy@8 {
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reg = <8>;
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};
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phy9: ethernet-phy@9 {
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reg = <9>;
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};
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phy10: ethernet-phy@10 {
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reg = <10>;
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};
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phy11: ethernet-phy@11 {
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reg = <11>;
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};
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};
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&switch {
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ethernet-ports {
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port0: port@0 {
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reg = <0>;
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phy-handle = <&phy0>;
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};
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port1: port@1 {
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reg = <1>;
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phy-handle = <&phy1>;
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};
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port2: port@2 {
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reg = <2>;
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phy-handle = <&phy2>;
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};
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port3: port@3 {
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reg = <3>;
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phy-handle = <&phy3>;
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};
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port4: port@4 {
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reg = <4>;
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phy-handle = <&phy4>;
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};
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port5: port@5 {
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reg = <5>;
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phy-handle = <&phy5>;
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};
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port6: port@6 {
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reg = <6>;
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phy-handle = <&phy6>;
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};
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port7: port@7 {
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reg = <7>;
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phy-handle = <&phy7>;
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};
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port8: port@8 {
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reg = <8>;
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phy-handle = <&phy8>;
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};
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port9: port@9 {
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reg = <9>;
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phy-handle = <&phy9>;
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};
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port10: port@10 {
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reg = <10>;
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phy-handle = <&phy10>;
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};
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port11: port@11 {
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reg = <11>;
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phy-handle = <&phy11>;
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};
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};
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};
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