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https://github.com/brain-hackers/u-boot-brain
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1a048cd656
Till now we have had cases where we had one phy device per dpmac. Now, with the upcoming products (LX2160AQDS), we have cases, where there are sometimes two phy devices for one dpmac. One phy for TX lanes and one phy for RX lanes. to handle such cases, add the support for multiple phys in ethernet driver. The ethernet link is up if all the phy devices connected to one dpmac report link up. also the link capabilities are limited by the weakest phy device. i.e. say if there are two phys for one dpmac. one operates at 10G without autoneg and other operate at 1G with autoneg. Then the ethernet interface will operate at 1G without autoneg. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
74 lines
1.9 KiB
C
74 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015 Freescale Semiconductor
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*/
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#ifndef __LDPAA_WRIOP_H
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#define __LDPAA_WRIOP_H
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#include <phy.h>
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#define DEFAULT_WRIOP_MDIO1_NAME "FSL_MDIO0"
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#define DEFAULT_WRIOP_MDIO2_NAME "FSL_MDIO1"
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#define WRIOP_MAX_PHY_NUM 2
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enum wriop_port {
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WRIOP1_DPMAC1 = 1,
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WRIOP1_DPMAC2,
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WRIOP1_DPMAC3,
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WRIOP1_DPMAC4,
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WRIOP1_DPMAC5,
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WRIOP1_DPMAC6,
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WRIOP1_DPMAC7,
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WRIOP1_DPMAC8,
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WRIOP1_DPMAC9,
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WRIOP1_DPMAC10,
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WRIOP1_DPMAC11,
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WRIOP1_DPMAC12,
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WRIOP1_DPMAC13,
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WRIOP1_DPMAC14,
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WRIOP1_DPMAC15,
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WRIOP1_DPMAC16,
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WRIOP1_DPMAC17,
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WRIOP1_DPMAC18,
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WRIOP1_DPMAC19,
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WRIOP1_DPMAC20,
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WRIOP1_DPMAC21,
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WRIOP1_DPMAC22,
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WRIOP1_DPMAC23,
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WRIOP1_DPMAC24,
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NUM_WRIOP_PORTS,
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};
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struct wriop_dpmac_info {
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u8 enabled;
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u8 id;
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u8 board_mux;
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int phy_addr[WRIOP_MAX_PHY_NUM];
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phy_interface_t enet_if;
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struct phy_device *phydev[WRIOP_MAX_PHY_NUM];
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struct mii_dev *bus;
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};
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extern struct wriop_dpmac_info dpmac_info[NUM_WRIOP_PORTS];
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void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl);
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void wriop_init_dpmac_enet_if(int dpmac_id, phy_interface_t enet_if);
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int wriop_disable_dpmac(int dpmac_id);
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int wriop_enable_dpmac(int dpmac_id);
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int wriop_is_enabled_dpmac(int dpmac_id);
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int wriop_set_mdio(int dpmac_id, struct mii_dev *bus);
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struct mii_dev *wriop_get_mdio(int dpmac_id);
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int wriop_set_phy_address(int dpmac_id, int phy_num, int address);
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int wriop_get_phy_address(int dpmac_id, int phy_num);
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int wriop_set_phy_dev(int dpmac_id, int phy_num, struct phy_device *phydev);
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struct phy_device *wriop_get_phy_dev(int dpmac_id, int phy_num);
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phy_interface_t wriop_get_enet_if(int dpmac_id);
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void wriop_dpmac_disable(int dpmac_id);
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void wriop_dpmac_enable(int dpmac_id);
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phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl);
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void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl);
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void wriop_init_rgmii(void);
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#endif /* __LDPAA_WRIOP_H */
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