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https://github.com/brain-hackers/u-boot-brain
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b08c8c4870
Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
86 lines
2.1 KiB
C
86 lines
2.1 KiB
C
/*
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* (C) Copyright 2016 Linaro
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* Jon Medhurst <tixy@linaro.org>
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*
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* TC2 specific code for Versatile Express.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/armv7.h>
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#include <asm/io.h>
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#include <asm/u-boot.h>
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#include <common.h>
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#include <linux/libfdt.h>
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#define SCC_BASE 0x7fff0000
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bool armv7_boot_nonsec_default(void)
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{
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#ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT
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return false
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#else
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/*
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* The Serial Configuration Controller (SCC) register at address 0x700
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* contains flags for configuring the behaviour of the Boot Monitor
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* (which CPUs execute from reset). Two of these bits are of interest:
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*
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* bit 12 = Use per-cpu mailboxes for power management
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* bit 13 = Power down the non-boot cluster
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*
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* It is only when both of these are false that U-Boot's current
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* implementation of 'nonsec' mode can work as expected because we
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* rely on getting all CPUs to execute _nonsec_init, so let's check that.
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*/
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return (readl((u32 *)(SCC_BASE + 0x700)) & ((1 << 12) | (1 << 13))) == 0;
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#endif
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}
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#ifdef CONFIG_OF_BOARD_SETUP
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int ft_board_setup(void *fdt, bd_t *bd)
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{
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int offset, tmp, len;
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const struct fdt_property *prop;
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const char *cci_compatible = "arm,cci-400-ctrl-if";
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#ifdef CONFIG_ARMV7_NONSEC
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if (!armv7_boot_nonsec())
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return 0;
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#else
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return 0;
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#endif
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/* Booting in nonsec mode, disable CCI access */
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offset = fdt_path_offset(fdt, "/cpus");
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if (offset < 0) {
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printf("couldn't find /cpus\n");
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return offset;
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}
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/* delete cci-control-port in each cpu node */
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for (tmp = fdt_first_subnode(fdt, offset); tmp >= 0;
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tmp = fdt_next_subnode(fdt, tmp))
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fdt_delprop(fdt, tmp, "cci-control-port");
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/* disable all ace cci slave ports */
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offset = fdt_node_offset_by_prop_value(fdt, offset, "compatible",
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cci_compatible, 20);
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while (offset > 0) {
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prop = fdt_get_property(fdt, offset, "interface-type",
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&len);
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if (!prop)
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continue;
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if (len < 4)
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continue;
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if (strcmp(prop->data, "ace"))
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continue;
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fdt_setprop_string(fdt, offset, "status", "disabled");
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offset = fdt_node_offset_by_prop_value(fdt, offset, "compatible",
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cci_compatible, 20);
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}
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return 0;
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}
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#endif /* CONFIG_OF_BOARD_SETUP */
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