This patch corrects the missing PLLB initialization in usb_cpu_init()
for AT91SAM9261.
Because of the missing PLLB initialization, the USB support for all
AT91SAM9261 based boards will work only if the PLLB is configured by a
precedent bootloader.
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch fixes MDIO clock setup in case when OPB frequency is 100MHz.
Current code assumes that the value of sysinfo.freqOPB is 100000000
when OPB frequency is 100MHz. In reality it is 100000001. As a result
MDIO clock is set to incorrect value, larger than 2.5MHz, thus violating
the standard. This in not a problem on boards equipped with Marvell PHYs
(e.g. Canyonlands), since those PHYs support MDIO clocks up to 8.3MHz,
but can be a problem for other PHYs (e.g. Realtek ones).
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
When PCI device use system memory, some PCI host controller should be
set physical memory address.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
eth_halt() function in the smc911x drivers used to call the
smc911x_reset() function. eth_halt() used to be called after
tftp transfers. This used to put the ethernet chip in reset
while the linux boots up resulting in the ethernet driver
not coming up. NFS boot used to fail as a result.
This patch calls smc911x_shutdown() instead of smc911x_reset().
Some comments received has also been fixed.
Signed-off-by: Manikandan Pillai <mani.pillai@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some boards do not have SROM support for the DM9000 network adapter.
Instead of listing these board names in the driver code, make this
option configurable from the board config file.
It also removes a build warning for the at91sam9261ek board:
'dm9000x.c:545: warning: 'read_srom_word' defined but not used'
And it repaires the trizepsiv board build which was broken around the
same routines
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
If the MAX address is given by the environment, write it back to the
hardware.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Several boards used different ways to specify the size of the
protected area when enabling flash write protection for the sectors
holding the environment variables: some used CONFIG_ENV_SIZE and
CONFIG_ENV_SIZE_REDUND, some used CONFIG_ENV_SECT_SIZE, and some even
a mix of both for the "normal" and the "redundant" areas.
Normally, this makes no difference at all. However, things are
different when you have to deal with boards that can come with
different types of flash chips, which may have different sector
sizes.
Here we may have to chose CONFIG_ENV_SECT_SIZE such that it fits the
biggest sector size, which may include several sectors on boards using
the smaller sector flash types. In such a case, using CONFIG_ENV_SIZE
or CONFIG_ENV_SIZE_REDUND to enable the protection may lead to the
case that only the first of these sectors get protected, while the
following ones aren't.
This is no real problem, but it can be confusing for the user -
especially on boards that use CONFIG_ENV_SECT_SIZE to protect the
"normal" areas, while using CONFIG_ENV_SIZE_REDUND for the
"redundant" area.
To avoid such inconsistencies, I changed all sucn boards that I found
to consistently use CONFIG_ENV_SECT_SIZE for protection. This should
not cause any functional changes to the code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Paul Ruhland
Cc: Pantelis Antoniou <panto@intracom.gr>
Cc: Stefan Roese <sr@denx.de>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: Dave Ellis <DGE@sixnetio.com>
Acked-by: Stefan Roese <sr@denx.de>
Return value of mmc_send_if_cond() can be safely ignored (as it is
done in Linux). This makes older cards work with MXC MCI controller.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
This patch now enabled this cfi-mtd wrapper to correctly detect and
erase the last sector in an NOR FLASH device.
Signed-off-by: Stefan Roese <sr@denx.de>
SCR & switch data are read from card as big-endian words and should be
converted to CPU byte order.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Cards which are not compatible with SD 2.0 standard, may return response
for CMD8 command, but it will be invalid in terms of SD 2.0. We should
accept this case as admissible, just like Linux does.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The mmc code defines the response as an array of chars. However, it
access the response bytes both as (i) an array of four uints (with
casts) and (ii) as individual chars. The former case is used more
often, including by the driver when it assigns the response.
The char-wise accesses are broken on little endian systems because they
assume that the bytes in the uints are in big endian byte order.
This patch fixes this by changing the response to be an array of four
uints and replacing the char-wise accesses with equivalent uint-wise
accesses.
Signed-off-by: Rabin Vincent <rabin@rab.in>
The generic MMC core uses direct long long divisions, which do not build
with ARM EABI toolchains. Use lldiv() instead, which works everywhere.
Signed-off-by: Rabin Vincent <rabin@rab.in>
find_mmc_device returns NULL if an invalid device number is specified.
Check for this to avoid dereferencing NULL pointers.
Signed-off-by: Rabin Vincent <rabin@rab.in>
This patch enables Smart Media (SMC) ECC byte ordering which is used
on the PPC4xx NAND FLASH controller (NDFC). Without this patch we have
incompatible ECC byte ordering to the Linux kernel NDFC driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
With this patch non-uniform NOR FLASH chips (chips with multiple erase
regions) can be exported via the cfi-mtd layer and therefor used by UBI.
We select the largest sector size as erasesize. The cfi driver will make
sure that the smaller sectors are handled correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
Fix bug in drawing long version/info strings:
U-Boot version string like
"U-Boot 2009.03-05647-g7c51e06 (Apr 23 2009 - 12:40:00) MPC83XX"
is long and doesn't wrap around correctly while drawing
beside the logo. Such long strings partially overwrite
the logo. This patch is an attempt to fix it.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
With this patch the NAND and OneNAND devices are registered in the MTD
subsystem and can then be referenced by the mtdcore code (e.g.
get_mtd_device_nm()). This is needed for the new "ubi part" command
syntax without the flash type parameter (nor|nand|onenand).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes this compilation warning when CONFIG_MTD_PARTITIONS is
defined:
nand_base.c: In function 'nand_release':
nand_base.c:2922: warning: implicit declaration of function 'del_mtd_partitions'
Signed-off-by: Stefan Roese <sr@denx.de>
As the common code also handles baudrate switching, which the board
specific vct.c driver did not support, this is one of the rare
occassions where deleting code actually adds a feature :)
Signed-off-by: Detlev Zundel <dzu@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
__attribute__ follows gcc's documented syntax and is generally more
common than __attribute. This change is only asthetic and should not
affect functionality.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Make the U-Boot dm9000 driver read addresses from EEPROM just
like Linux does ... read six bytes, instead of reading twelve
bytes and then discarding every other one.
Using the right Ethernet address is a big win.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Fix the problem that cannot access actual data when CPU data cache enabled.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Tested-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Fix dependency goofage: it should certainly be possible to have the
partition support without bringing in UBI commands.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Stefan Roese <sr@denx.de>
We need to make sure the data written to the nand flash controller makes
it there before we start polling its status register. Otherwise, we may
get stale data and return before the controller is actually ready.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Scott Wood <scottwood@freescale.com>
This Patch adds Support for PXA27X UDC.
(Rebased to drivers/usb reorganisation)
Signed-off-by: Vivek Kutal <vivek.kutal@azingo.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
move to linux usb driver organisation
as following
drivers/usb/gadget
drivers/usb/host
drivers/usb/musb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Blackfin SPI driver was not driving the SPI chip-select high before
putting the chip-select signals into tri-state mode. This is probably
something that slipped by unnoticed in most designs. If the signals are
put directly into a tri-state mode, then the board is relying on the
pull-up resistors to pull up the chip-select before the next transaction.
Most of the time this is fine, except when you have two transactions that
follow each other very closely, such as the flash erase and read status
register commands. In this case I was seeing a 500ns separation between
the transactions. In my setup, with a 10kOhm pull-up, it would meet
timing spec about half the time and resulted in intermittent errors. (A
stronger pull up would fix this, but our design is targeted for low power
consumption and a 3.3kOhm @ 3.3v is 3.3mW of needless power consumption.)
I modified the spi_cs_deactivate() function in bfin_spi.c to drive the
chip-selects high before putting them into tri-state. For me, this
resulted in a rise time of 5ns instead of the previous rise time of about
1us, and fully satisfied the timing spec of the chip.
Signed-off-by: Todor I Mollov <tmollov@ucsd.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
On platforms with multiple NOR chips, currently only the first one
can be selected using the "ubi part" command. This patch fixes this
problem by using different names for the NOR "mtd devices".
It also changes the name of the NOR MTD device from "cfi-mtd" to
"norX" (X indexing the device numer) to better match the mtdparts
defaults.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
introduce serial_exit for this purpose. Use it only when the rm9200
serial driver is active
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The AT91RM9200-EK Evaluation Board supports the AT91RM9200
ARM9-based 32-bit RISC microcontroller and enables real-time code development
and evaluation.
Here is the chip page on Atmel website:
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507
with
- NOR (cfi driver)
- DataFlash
- USB OHCI
- Net
- I2C (hard)
Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
In set_ddr_laws() when we determined how much of the size requested
to be mapped was covered by the the first LAW we needed to recalculate
the size based on what was actually mapped.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Rename the pci header for FSL HW so we can move some prototypes
in there and stop doing explicit externs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Mflash is fusion memory device mainly targeted consumer eletronic and
mobile phone.
Internally, it have nand flash and other hardware logics and supports
some different operation (ATA, IO, XIP) modes.
IO mode is custom mode for the host that doesn't have IDE interface.
(Many mobile targeted SoC doesn't have IDE bus)
This driver support mflash IO mode.
Followings are brief descriptions about IO mode.
1. IO mode based on ATA protocol and uses some custom command. (read
confirm, write confirm)
2. IO mode uses SRAM bus interface.
Signed-off-by: unsik Kim <donari75@gmail.com>
