Commit Graph

4 Commits

Author SHA1 Message Date
David Brownell
480ed1dea1 use correct at91rm9200 register name
This fixes a naming bug for at91rm9200 lowlevel init code:
NOR boot flash is on chipselect 0, not chipselect 2.  This
makes code use the register name from chip datasheets.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2008-03-30 15:38:05 +02:00
Wolfgang Denk
c0e82d5016 Set the AT91RM9200 clock to asynchronous mode
Patch by Anders Larsen, 03 May 2005
2005-10-05 02:06:08 +02:00
Wolfgang Denk
3b9dfddfd8 Set the AT91RM9200 clock to synchronous mode
Patch by Anders Larsen, 29 Apr 2005
2005-10-05 02:02:25 +02:00
wdenk
a85f9f21aa Patch by Steven Scholz, 06 Apr 2005:
- creating SoC subdir for Atmel AT91RM9200 cpu/arm920t/at91rm9200
- moving code out of cpu/at91rm9200 into cpu/arm920t/at91rm9200
2005-04-06 13:52:31 +00:00