Commit Graph

2 Commits

Author SHA1 Message Date
Sonic Zhang
f4d8038439 blackfin: run core1 from L1 code sram start address in uboot init code on core 0
Define core 1 L1 code sram start address.
Add function to enable core 1 for BF609 and BF561.
Add config macro to allow customer to run core 1 in uboot init code on core 0.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 15:47:24 +08:00
Bob Liu
3ead92c571 blackfin: bf60x: new processor header files
Add header files for blackfin new processor bf60x.

Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
2013-03-04 13:42:06 +08:00