Commit Graph

7575 Commits

Author SHA1 Message Date
Peng Fan
f2ff834365 imx: mx6: ddr init MMDC according to ddr_type
To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg
when ddr_type is for DDR3. Later we can use ddr_type to initialize
MMDC for LPDDR2.

Initialize ddr_type for different boards which enable SPL.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2015-09-02 15:34:12 +02:00
Peng Fan
003fa83c43 imx: mx6: ddr add an entry ddr_type for mx6_ddr_sysinfo
Add ddr_type entry for mx6_ddr_sysinfo. It will be used for
differenrate DDR3 and LPDDR2.

Introduce an enum type for ddr_type.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
2015-09-02 15:34:12 +02:00
Peng Fan
775d591f5d imx: mx6: ddr add mpzqlp2ctl entry
Add mpzqlp2ctl entry for mx6_mmdc_calibration.
MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
2015-09-02 15:34:12 +02:00
Peng Fan
1b811e285c imx: mx6: ddr add dram io configuration and header file for i.MX6SL
Define two structure mx6sl_iomux_ddr_regs and mx6sl_iomux_grp_regs.
Add a new function mx6sl_dram_iocfg to configure dram io.
Add header file to define macros for register address.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-09-02 15:34:12 +02:00
Peng Fan
2cd8cd06bb imx: mx6: ddr correct tRFC and tXS
To Chip density 4Gb, tRFC should be 300ns, see
"Table 61 — Refresh parameters by device density" of JESD79-3E.
tXS(min) is max(5nCK, tRFC(min) + 10ns).

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-09-02 15:34:12 +02:00
Peng Fan
24139754f5 imx: mx6: ddr no support MMDC1 for i.MX6SL
i.MX 6SoloLite only supports MMDC0, so do not access MMDC1 for i.MX 6SL.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-09-02 15:34:12 +02:00
Peng Fan
43d9dc4136 imx: mx6: ddr add more register entry for mmdc_p_regs
Add more register entry for MMDC structure.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-09-02 15:34:12 +02:00
Soeren Moch
c3f871c176 tbs2910: use full name in Kconfig board selection
Signed-off-by: Soeren Moch <smoch@web.de>
2015-09-02 15:34:11 +02:00
Adrian Alonso
26dd346464 imx: mxc_gpio: add support for imx7d SoC
* Add mxc_gpio support for imx7d SoC
* Use CONFIG_MX7 to extend mxc gpio driver support for imx7d

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-02 15:31:33 +02:00
Adrian Alonso
03f0e4c7cd imx: iomux-v3: add imx7d support for iomuxc
* Add imx7d support for iomux controller
* imx7d has two iomux controllers iomuxc (0x3033000) and iomuxc-lpsr
  (0x302C0000) each conroller provides control and mux mode pad
  registers but shares iomuxc input select register with iomuxc-lpsr
  IOMUX_CONFIG_LPSR flag is used to properly set daisy chain settings
  for iomuxc-lpsr pads.
* Since mx7d introduces LPSR IOMUX pins, add new base to IOMUX v3
  driver for these LPSR pins.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2015-09-02 15:31:33 +02:00
Peng Fan
6d97dc10a8 imx: clock support enet2 anatop clock support
To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
   To value 1, only i.MX6SX/UL can pass the check.
2. Modify board code who use this api to follow new api prototype.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2015-09-02 15:29:14 +02:00
Peng Fan
fc684e87a1 imx-common: consolidate macros and prototypes into sys_proto.h
Move most macro definitions and prototypes into
"arch/arm/include/asm/imx-common/sys_proto.h" to avoid duplicated
function prototypes and marco definitions for different i.MX SoCs.

This patch do not remove the sys_proto.h for different i.MX SoCs,
because we need to modify lots of driver code and others. This patch
remove duplicated macros and prototypes and incude "sys_proto.h"
of imx-common for each sys_proto.h of different i.MX platforms.
Then later we should avoid add stuff in sys_proto.h of each platform,
and modify driver to include common sys_proto.h.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-09-02 15:29:14 +02:00
Peng Fan
bf3b9cb6e8 imx: mxs: reimplement get_cpu_rev
Rewrite get_cpu_rev, from "static const char *get_cpu_rev(void)" to
"u32 get_cpu_rev(void)". To align with get_cpu_rev of other i.MXes.

Also write get_imx_type to replace get_cpu_type, since we have
macro named get_cpu_type.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-09-02 15:29:14 +02:00
Peng Fan
2af896abf6 imx: mx31 use new formula for get_cpu_rev
Use new formula for get_cpu_rev, since we need to use this formula
to do runtime check for all i.MXes.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-09-02 15:29:14 +02:00
Peng Fan
49ea15d55f imx: mx27 implement get_cpu_rev
Implement get_cpu_rev to support runtime check using is_cpu_type.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-09-02 15:29:14 +02:00
Peng Fan
c398e7503d imx: add cpu type for i.MX2 and i.MX3
Add cpu types for i.MX2/3.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-09-02 15:29:14 +02:00
Peng Fan
21782828f9 imx: mx6 move TARGET_xx Kconfig option to mx6 specific Kconfig file
Move TARGET_xx Kconfig option based on mx6 to arch/arm/cpu/armv7/mx6/Kconfig.
Add enable "CONFIG_ARCH_MX6" for boards based on mx6.
Then we can choose target boards using "make ARCH=arm menuconfig"
with ARCH_MX6 defined.

If using original way, we have no chance to enable ARCH_MX6 when
"make menuconfig". Even define CONFIG_ARCH_MX6=y in xx_defconfig,
kconfig will complains "arch/../configs/platinum_titanium_defconfig:3:
warning: override: TARGET_PLATINUM_TITANIUM changes choice state"

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Soeren Moch <smoch@web.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Soeren Moch <smoch@web.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2015-09-02 15:29:14 +02:00
Damien Riegel
f3488bb39d ARM: ts4800: add ethernet support
This commit adds ethernet support to the TS4800. Note that the
MAC address is not fused on this board and have to be read from
FEC PALR PAUR registers (this is how the kernel provided by
Technologic Systems does it).

signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-09-02 15:26:13 +02:00
Lucile Quirion
9ee16897a2 ARM: ts4800: add basic board support
This commit adds basic support including:
MMC, Serial console, TS4800 watchdog

The config use CONFIG_SKIP_LOWLEVEL_INIT as U-boot is used as a second
stage bootloader.

Signed-off-by: Lucile Quirion <lucile.quirion@savoirfairelinux.com>
signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-09-02 15:26:13 +02:00
Marek Vasut
066f876bf6 arm: mxs: Fix mkimage invocation
Remove this ad-hoc mkimage invocation in MXS Makefile and replace
it with the standard mkimage rule instead.

This patch fixes recent build issues introduced by the patch
92a655c mkimage: Set up a file size parameter and keep it updated
These build issues could be triggered by building for example the
MX28EVK and the u-boot.sb image:

$ make mx28evk_defconfig
$ make V=1 u-boot.sb
[...]
make -f ./scripts/Makefile.build obj=arch/arm/cpu/arm926ejs/mxs u-boot.sb
  ./tools/mkimage -n arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg -T mxsimage u-boot.sb
./tools/mkimage: Can't open (null): Bad address
arch/arm/cpu/arm926ejs/mxs/Makefile:82: recipe for target 'u-boot.sb' failed
make[1]: *** [u-boot.sb] Error 1
Makefile:989: recipe for target 'u-boot.sb' failed
make: *** [u-boot.sb] Error 2

With this patch:
  ./tools/mkimage -n arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg -T mxsimage -d arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg u-boot.sb

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Juha Lumme <juha.lumme@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-09-02 15:26:11 +02:00
vpeter4
78506c2f86 udoo: Switch to SPL support
Currently we need to build one U-boot image for each of the udoo
variants: quad and dual-lite.

By switching to SPL we can support all two variants with a single binary.

Based on the SPL for wandboard.

Tested with OpenELEC (Open Embedded Linux Entertainment Center)
on both boards.

Signed-off-by: Peter Vicman <peter.vicman@gmail.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Peter Vicman <peter.vicman@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-09-02 15:25:28 +02:00
Tom Rini
b7e84c93c4 Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2015-08-31 12:12:27 -04:00
Masahiro Yamada
9c6a3c6772 pinctrl: sandbox: add sandbox pinctrl driver
This driver actually does nothing but test pinctrl uclass, and
demonstrate how things work.

To try this driver, uncomment /* #define DEBUG */ in the
drivers/pinctrl/pinctrl-sandbox.c, and debug messages will be
displayed.

  DRAM:  128 MiB
  sandbox pinmux: group = 1 (serial_a), function = 1 (serial)
  Using default environment

  In:    cros-ec-keyb
  Out:   lcd
  Err:   lcd
  Net:   Net Initialization Skipped
  eth0: eth@10002000, eth1: eth@80000000, eth5: eth@90000000
  => i2c dev 0
  Setting bus to 0
  sandbox pinmux: group = 0 (i2c), function = 0 (i2c)
  sandbox pinconf: group = 0 (i2c), param = 3, arg = 1

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-31 07:57:29 -06:00
Simon Glass
6e474eab44 exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devices
Add a TPM node to the various Chromebooks so that driver can be converted to
driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-08-31 07:57:28 -06:00
Simon Glass
21baf15b4e dm: tpm: sandbox: Convert TPM driver to driver model
Convert the sandbox TPM driver to use driver model. Add it to the device
tree so that it can be found on start-up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-08-31 07:57:28 -06:00
Chen-Yu Tsai
92369844ec sunxi: Enable non-secure access to RTC on sun6i (A31s)
On the A31s the RTC is by default secured. Thus when u-boot
loads the kernel in non-secure world, the RTC is unavailable. The
SoC has a TrustZone Protection Controller, which can be used to
enable non-secure access to the RTC.

On the A31 the TZPC doesn't seem to do anything, i.e. changes to
its register contents do not affect access to the RTC.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-08-31 08:43:42 +02:00
Marcus Cooper
50222f3bab sunxi: Add support for the Olimex A20 EVB
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-08-31 08:43:42 +02:00
Hans de Goede
4ddcf1df17 sunxi: Add inet98v_rev2 defconfig and dts file
The inet98v_rev2 is a pcb used in generic A13 based tablets. It features
volume buttons, a power barrel, micro-usb otg, headphone connector and
a power button.

The dts file is identical to the one submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-08-31 08:43:42 +02:00
Hans de Goede
f9a37289b8 sunxi: Add support for gt90h-v4 tablets
The gt90h is a pcb found in generic 9" tablets with an A23 soc, 1G RAM
and 8G nand, rtl8723as usb wifi, 1 micro usb port and 1 micro sd slot.

The pmic setup on this board is somewhat special, dcdc2 MUST be set
to 1.1V instead of the usual 1.2V otherwise the board is very unstable.
aldo1 is used to power the micro sd slot, dldo1 is used for wifi.

This commit adds a defconfig + dts (as submitted to the kernel) for
the gt90h-v4 pcb.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-08-31 08:43:41 +02:00
Masahiro Yamada
f875bbb491 ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board support
Initial version of DTSI for ProXstream2 and PH1-LD6b and DTS for
PH1-LD6b reference board.

Import from Linux with some adjustments:
  - Use SPDX-License-Identifier
  - Add clock-frequency to serial nodes
  - Drop unusable nodes from -ref.dts

While I am here, sort Makefile entries alphabetically.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-31 00:29:23 +09:00
Masahiro Yamada
10ee0a68d8 ARM: dts: uniphier: add PH1-Pro5 SoC support
Initial version of UniPhier PH1-Pro5 device tree.

(Imported from Linux with adjustment for SPDX License Identifier)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-31 00:29:15 +09:00
Masahiro Yamada
d243c186e5 ARM: dts: uniphier: sync with Linux
This commit imports device tree updates from Linux.  It eventually
adds pinctrl-related nodes and properties.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-31 00:29:11 +09:00
Masahiro Yamada
f4e190e317 ARM: uniphier: enable SPL_OF_CONTROL
Device Tree really improves code maintainability and is now
available for SPL too.

This is the state-of-the-art implementation in U-boot.

The board files (platform data) are no longer needed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-31 00:25:06 +09:00
Masahiro Yamada
9271614eb3 ARM: uniphier: select SPL_DM rather than default in defconfig
Now UniPhier SoCs highly depend on Driver Model for SPL, too.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-30 22:20:20 +09:00
Masahiro Yamada
94bd3699ee ARM: uniphier: fix build error when CONFIG_DEBUG_LL is defined
The build error happens if CONFIG_DEBUG_LL and CONFIG_MACH_PH1_SLD3
are both enabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-30 22:19:00 +09:00
Kishon Vijay Abraham I
504de98a3b ARM: OMAP5/AM43xx: remove enabling USB clocks from enable_basic_clocks()
Now that we have separate function to enable USB clocks, remove
enabling USB clocks from enable_basic_clocks(). Now board_usb_init()
should take care to invoke enable_usb_clocks() for enabling
USB clocks.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:22 -04:00
Kishon Vijay Abraham I
09cc14f4bc ARM: AM43xx: Add functions to enable and disable USB clocks
Added functions to enable and disable USB clocks which can be invoked
during USB init and USB exit respectively.

Cc: Roger Quadros <rogerq@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:21 -04:00
Kishon Vijay Abraham I
ca5a0f172e ARM: OMAP5: Add functions to enable and disable USB clocks
Added functions to enable and disable USB clocks which can be invoked
during USB init and  USB exit respectively.

Cc: Roger Quadros <rogerq@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:21 -04:00
Kishon Vijay Abraham I
7ba792c044 board: ti: OMAP5: added USB initializtion code
Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in omap5 board file that
can be invoked by various gadget drivers.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:21 -04:00
Kishon Vijay Abraham I
7c379aaa03 board: ti: beagle_x15: added USB initializtion code
Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in beagle_x15 board file that
can be invoked by various gadget drivers.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:20 -04:00
Kishon Vijay Abraham I
7beaf8b690 ARM: DRA7: Enable clocks for USB OTGSS2 and USB PHY2
Enabled clocks for the second dwc3 controller and second USB PHY present in
DRA7.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:19 -04:00
Paul Kocialkowski
8ceb34a1d1 omap-common: SYS_BOOT fallback logic correction and support for more devices
The SYS_BOOT-based fallback shouldn't only check for one of the conditions of
use and then let the switch/case handle each boot device without enforcing the
conditions for each type of boot device again.

For instance, this behaviour would trigger the fallback for UART when
BOOT_DEVICE_UART is defined, CONFIG_SPL_YMODEM_SUPPORT is enabled (which should
be a show-stopper) and e.g. BOOT_DEVICE_USB is enabled and not
CONFIG_SPL_USB_SUPPORT.
Separating the logic for USB and UART solves this.

In addition, this adds support for more peripheral devices (USBETH and CPGMAC)
to the fallback mechanism. Note that the USBETH boot device should always be
different from the USB boot device (each should match a different bootrom
handoff case).

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2015-08-28 12:33:18 -04:00
Stefan Roese
f49cc22f5c arm: spear: Enable caches on SPEAr
The designware ethernet driver supports d-cache now. So there is nothing
stopping us now to enable the caches completely on SPEAr.

Tested on SPEAr600 x600 board.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
2015-08-28 12:33:17 -04:00
Stefan Roese
2fbdbda1c7 arm: spear: Move to common SPL infrastructure
The SPL implementation for SPEAr600 is older than the common SPL
infrastructure. This patch now moves the SPEAr600 SPL over to the
common SPL code.

Tested on the only SPEAr board that currently uses SPL in mainline
U-Boot, the x600.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
2015-08-28 12:33:16 -04:00
Lokesh Vutla
76b3f195e9 ARM: k2l: Fix device speeds
ARM supported speeds and init value of core_pll for SDP1200
are programmed wrong as part for the device speed cleanups.
Fixing it here.
Thanks to "Vitaly Andrianov <vitalya@ti.com>" for bisecting this issue

Fixes: c37ed9f11b61 ("ARM: keystone2: Fix dev and arm speed detection")
Tested-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28 12:33:16 -04:00
Lokesh Vutla
45fe4b4035 ARM: keystone2: Build MLO by default
MLO(NAND/MMC boot image), is used for all the ks2 platforms.
Enabling it in config.mk so that these images will be automatically
built upon calling make. u-boot-spi.gph is already the build target,
so not including here.

Reported-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28 12:33:15 -04:00
Lokesh Vutla
5f586e9fa1 ARM: keystone2: Rename u-boot-nand.gph to MLO
NAND boot mode, ROM expects an image with a gp header in the
beginning and an 8bytes filled with zeros at the end. The same is
true for SD boot on K2G platforms but the file name should be MLO.

Renaming u-boot-nand.gph to MLO, so that same image can be used for
NAND and SD boots. And also not including all the u-boot only images
under CONFIG_SPL_BUILD.

Reported-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28 12:33:15 -04:00
Nishanth Menon
cd43ddc019 ARM: keystone2: move the custom build rules out to keystone specific makefile
Keystone has build rules introduced by commit ef509b9063 ("k2hk: add
support for k2hk SOC and EVM") and commit 0e7f2dbac6 ("keystone: add
support for NAND gpheader image").

These are not reused by other platforms for the build, hence there is no
clear benefit is maintaining them in the generic makefile as a build
target. move these to the keystone specific make option

Original idea of using config.mk by Lokesh Vutla <lokeshvutla@ti.com>

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28 12:33:15 -04:00
Nishanth Menon
76cff2b108 ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0
DP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet
provided IODELAY values for standard RGMII phys do not work.

Silicon Revision(SR) 2.0 provides an alternative bit configuration
that allows us to do a "gross adjustment" to launch the data off a
different internal clock edge. Manual IO Delay overrides are still
necessary to fine tune the clock-to-data delays. This is a necessary
workaround for the quirky ethernet Phy we have on the platform.

NOTE: SMA registers are spare "kitchen sink" registers that does
contain bits for other workaround as necessary as well. Hence the
control for the same is introduced in a generic SoC specific, board
generic location.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:13 -04:00
Nishanth Menon
c1ea3bece2 ARM: DRA7: Add detection of ES2.0
Add support for detection of ES2.0 version of DRA7 family of
processors. ES2.0 is an incremental revision with various fixes
including the following:
- reset logic fixes
- few assymetric aging logic fixes
- MMC clock rate fixes
- Ethernet speed fixes
- edma fixes for mcasp

[ravibabu@ti.com: posted internal for an older bootloader]
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:12 -04:00