Sync the Falcon mode instructions with the ones fro pico-imx7d.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Add support for the VXT VL050-8048NT-C01 panel connected through
the 24 bit parallel LCDIF interface.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Because FIT could not be used for AHAB secure boot on i.MX8,
so switch to use container image that could let SPL verify
ATF and U-Boot with AHAB.
Enable HUSH_PARSER in defconfig to make run netboot could work.
Note: The AHAB related code has not been added.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Because FIT could not be used for AHAB secure boot on i.MX8,
so switch to use container image that could let SPL verify
ATF and U-Boot with AHAB.
Note: The AHAB related code has not been added.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The first stage of flash.bin is larger than 584 * 512, so when
writting u-boot.itb, some data will be override. Enlarge the
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to fix boot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since the SD3.0 kernel driver needs M4 image support, this causes
problem for usb boot booting into kernel. To decouple the relationship,
we modify the FDT file in u-boot to disable SD3.0.
So the kernel won't depend on M4 image.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This prevents messages like
gpio@20a0000: get_value: error: gpio GPIO2_2 not reserved
when CONFIG_DM_GPIO is enabled.
Also, when CONFIG_DM_GPIO is enabled, checkboard is too
early to use gpio_get_value, so read it directly on failure.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Commit e37ac717d7 ("Convert to use fsl_esdhc_imx for i.MX platforms")
converted FSL_ESDHC to FSL_ESDHC_IMX, but the config check for
apalis_imx6 wasn't updated accordantly.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Only one dtb is currently supported, so match with imx6-apalis.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
To support DM_VIDEO,
Add display node for lcdif
Drop board iomuxc settings.
Enable DM_VIDEO
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
When booting SPL on the board, met boot failure:
"
Trying to boot from MMC2
MMC Device 1 not found
spl: could not find mmc device 1. error: -19
SPL: failed to boot from all boot devices
"
Let's register the two mmc controllers in SPL stage to
avoid boot failure.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Add i.MX6ULZ board support. the i.MX6ULZ is SW compatible
with i.MX6ULL. so most code of i.MX6ULL can be reused
by i.MX6ULZ.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The SPL device tree is missing the entires for gpio1, uart1, usdhc1 and
usdhc2. This creates the missing imx6q-logicpd-u-boot.dtsi file
which will enable these functions so SPL can properly setup UART, detect
microSD card, and startup.
Fixes: 8f4691e31a ("ARM: imx6q_logic: With SPL_OF_CONTROL enabled,
remove MMC init")
Signed-off-by: Adam Ford <aford173@gmail.com>
On HS devices the access to TRNG is restricted on the non-secure
ARM side, disable the node in DT to prevent firewall violations.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
When booting through the efi stub, the memory map get's created by
reading the dram bank information. Depending on the version of the RPi4
this information changes. Read the device tree to initialize the dram
bank data structure. This way the kernel is able to access the whole
range of available memory.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Add SerDes1 protocol 14 in the list of supported protocols.
This configuration enables one high-speed 100G port and PCIe x4.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The code that generates the compatible property concatenates the
ethernet phy id and clause-compatible information without
separating them with a comma, resulting into no ethernet phy driver
getting loaded by Linux kernel.
Suffix phy_id_compatible_str with comma to fix this
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
lx2160a rev1 and rev2 SoC has different pcie controller.
The pcie controller device tree node fields "compatible"
and registers names needs to be updated accordingly
This change in device tree is handled as part of
fdt fixups. These changes would only be applied
if the soc revision is not rev1.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
-----BEGIN PGP SIGNATURE-----
iQJGBAABCAAwFiEEiUuSfQSYnG8EMsBltDliWyzx00MFAl1yhwYSHG1icnVnZ2Vy
QHN1c2UuY29tAAoJELQ5Ylss8dNDNE8QAIzrHZ0RYg6eMCBFzAOyFu+daxUqB1vh
GR3Kq2ku5+cwmWDRhZjj5Y8ualFqm5/IVvIbYLpV8r5ltnHJOsLCUiNVFsyod3uY
Np3TtTH6B1QkZAJhz+kqHUHlrNlys/+7vEv1gHdSjZ+fM3OTB+NOzA6cjPMPl1lD
fGQBEeoddMVjA7UDyoEORrwlQTy7PK82FK5xge4S8nmTrCwGkqkapg24haQwabSd
QvNjXte1r3g/fsQZ+tFRIZEqOrBpdqXt1sEjrDe8ICjUeRIaOs/3lJxgjk2H1ia6
x9O7u3OJNgmjs7Y5idi5pXBNiEMKFJCInAecPg6vKkaw/CAQgoQN+8MP5jjE4Cvr
5oN6vkbScSZ8TeSYgb9NoGZ2/YxqJv67U2+4xSLn9eWPflwy3iVIOaM8R1cOEiHy
On9tE1JMkIEQ6DClyXlERovTnAUkfFh9Wac8UbTxqHEhcBtGzRkPSYkCRXBR6mL1
GNh3XZEFLDAczm/nzwQSgbGqKo02siKlOJbKh5PMRA/SZXVKY0BlkpI8hmj+2ra0
V33YjmwxS+NJdRIQJoVQVgJ8eIFdioJ6+6G3oV7btGlgbA1sJajHtm3ZZ5+080+I
fbiy1ibUjnrWcVmPWEtY3pr6ZzcL52N8Nzj7c02yej2PS/VL2ewYj7vjmUhFOVYv
uHKtATRqUYCz
=hWTf
-----END PGP SIGNATURE-----
Merge tag 'rpi-next-2019.10' of https://github.com/mbgg/u-boot
- fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
Define the memory map for the BCM2711 based on the dt configuration
available in the Raspberry Pi kernel fork.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
[mb: BCM2838 -> BCM2711]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The Raspebrry Pi 4 uses the new revision code scheme as documented by
the foundation. This change adds an entry for this board as well.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Align the board and driver prototype for board_interface_eth_init
to avoid execution issue (the interface_type parameter is defined
as int or phy_interface_t).
To have a generic weak function (it should be reused by other driver)
I change the prototype to use directly udevice.
This prototype is added in netdev.h to allow compilation check
and avoid warning when compiling with W=1 on file
board/st/stm32mp1/stm32mp1.c
warning: no previous prototype for 'board_interface_eth_init'\
[-Wmissing-prototypes]
int board_interface_eth_init(int interface_type, ....
^~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
These are some very late changes mostly required to get 64-bit
division working on ARC boards.
For that we had to import missing parts of libgcc and add compiler
flags to EMSDP which otherwise used very simple profile for compliation.
And while at it another fix for EM SDP initialization is inluded as well.
Even though EM SDP is FPGA-based board and different FPGA
images (known as .bit-files) are awailable for the board still
there's a common subset of options we may rely on for all configs.
These are:
* Normalizer
* Swap instructions
* Simple multiplier
* Barrel-shifter
* Floating-point unit
* Shorter instructions (code density)
This among other improvements allows to compile code with
64-bit divisions, see [1].
[1] https://patchwork.ozlabs.org/patch/1156541/
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
If the "Page Mode" is not enabled on the device,
read operations from PSRAM may result in incorrect data.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Find the UCLASS_CACHE driver to configure the cache controller's
settings.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch sets the serial# environment variable by reading the
board serial number from the OTP memory region.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Add DT entry for the DM PCI driver, update board configs
and drop ad-hoc board init code for the PCI bus. Instead,
let the DM PCI driver initialize and operate the hardware.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This reverts commit fc04b92354 where the
FVP DRAM configuration was added.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines for P2041RDB,
P3041, P4080, P5020 and P5040 DS boards only when DM_PCI is
not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines for P1020,
P1021, P1024, P1025 and P2020 RDB boards only when DM_PCI
is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Support of device tree model for T2080RDB, T4240RDB, T1024RDB,
T1042D4RDB, P1020RDB, P2020RDB, P2041RDB, P3041DS, P4080DS, P5040DS and
MPC8548CDS. Also support of i2c dm model.
