Commit Graph

3842 Commits

Author SHA1 Message Date
Albert ARIBAUD
e62d5fb0da Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2013-09-04 14:06:56 +02:00
Albert ARIBAUD
4eef93da26 Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master' 2013-09-04 11:50:25 +02:00
Albert ARIBAUD
6d4511b2c6 Merge 'u-boot-microblaze/zynq' into (u-boot-arm/master'
Conflicts:
	arch/arm/include/asm/arch-zynq/hardware.h

The conflict above was trivial and solved during merge.
2013-09-03 14:01:02 +02:00
Heiko Schocher
988ea35501 arm, am335x: add watchdog support
Add TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog support.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2013-08-28 11:44:59 -04:00
Heiko Schocher
14c0158b18 arm, am335x: add some missing registers and defines for lcd and epwm support
- add missing register defines in struct cm_perpl
  epwmss0clkctrl
  epwmss2clkctrl
  lcdcclkstctrl
- add missing register defines in struct cm_dpll
  clklcdcpixelclk
- add struct pwmss_regs
- add struct pwmss_ecap_regs
- add LCD Controller base LCD_CNTL_BASE
- add PWM0 controller base PWMSS0_BASE

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
2013-08-28 11:44:59 -04:00
Heiko Schocher
dafd4db33a arm, am33xx: add defines for gmii_sel_register bits
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-08-28 11:44:59 -04:00
Tom Rini
c3799fceda omap5: Expand CONFIG_SPL_MAX_SIZE and comment upon SRAM_SCRATCH_SPACE_ADDR
After examining both TRMs and doing some experimentation, we can rely on
using the start of the download area for CONFIG_SPL_TEXT_BASE and then
move SRAM_SCRATCH_SPACE_ADDR up, just like am335x.  This is required for
peripheral boot modes such as UART.

Signed-off-by: Tom Rini <trini@ti.com>
2013-08-28 11:44:58 -04:00
Tom Rini
c27efde68d am33xx: Correct and expand comments on CONFIG_SPL_MAX_SIZE
We had been allowing the max size to be larger than actually allowed by
the ROM.  Expand the commentary here to explain why we set these
locations.

Signed-off-by: Tom Rini <trini@ti.com>
2013-08-28 11:44:58 -04:00
Albert ARIBAUD
8d20836615 arm: omap3: fix SRAM copy and execution sequence
Fix size calculation in copy of go_to_speed into SRAM.
Use SRAM_CLK_CODE in call to SRAM-based go_to_speed.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-08-28 11:44:58 -04:00
Lubomir Popov
81aee9723d ARM: OMAP4470: Add Elpida EDB8164B3PF memory configuration
OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board.
This memory has 4Gb x 2CS = 8Gb configuration.
Add configuration for runtime calculation and precalculated cases.

Patch is based on a draft Lubomir's patch [1].

[1] http://lists.denx.de/pipermail/u-boot/2013-April/150851.html

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
[taras@ti.com: cleaned up patch and fixed precalculated values]
Signed-off-by: Taras Kondratiuk <taras@ti.com>
2013-08-28 11:44:58 -04:00
Taras Kondratiuk
40aadf9201 ARM: OMAP4470: Add voltage and dpll data
OMAP4470 reference design uses TWL6032 PMIC
with a following connection scheme:
  VDD_CORE = TWL6032 SMPS2
  VDD_MPU  = TWL6032 SMPS1
  VDD_IVA  = TWL6032 SMPS5

Set voltage and frequency values according to
OMAP4470 Data Manual Operating Condition Addendum v0.7

Signed-off-by: Taras Kondratiuk <taras@ti.com>
2013-08-28 11:44:58 -04:00
Taras Kondratiuk
696f81f9a9 ARM: OMAP4470: Add OMAP4470 identification
Signed-off-by: Taras Kondratiuk <taras@ti.com>
2013-08-28 11:44:58 -04:00
Fabio Estevam
76b6b19614 usb: ehci-mx5: Use 'bool' instead of 'unsigned char'
The 'enable' argument can be better expressed as boolean.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
2013-08-26 21:56:34 +02:00
Dan Murphy
d3d037ae18 ARM: OMAP5: USB: Add OMAP5 common USB EHCI information
* Enable the OMAP5 EHCI host clocks
* Add OMAP5 EHCI register definitions
* Add OMAP5 ES2 host revision

Signed-off-by: Dan Murphy <dmurphy@ti.com>
2013-08-26 21:55:46 +02:00
Bo Shen
1f7b06ee5f arm: sama5d3: fix smc cs related registers offset
the smc cs related registers start at 0x600 and loop with 5 registers
so the reserved register should be in at91_smc structure while no in
at91_cs structure. So fix it

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-08-22 16:50:58 +02:00
Wu, Josh
be3dbef502 ARM: at91: sama5d3: remove unused definition about PMECC alpha table offset
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-08-22 16:50:21 +02:00
Wu, Josh
b2d96dc28f ARM: at91: atmel_nand: pmecc driver will select the galois table by sector size
Define the galois index table offset in chip head file. So user do not need
to set by himself. Driver will set it correctly according to sector_size.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
[rebased on master]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-08-22 16:50:16 +02:00
Bo Shen
e08d6f3aaf arm: atmel: add gmac support for sama5d3xek board
add gmac support for sama5d3xek board, the gmac embedded in:
  - sama5d33, sama5d34, sama5d35

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-08-22 16:49:54 +02:00
Tom Rini
6612ab3395 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2013-08-21 16:27:47 -04:00
Николай Пузанов
e6394e9e8f Fix for incorrect conversion hex string to number (FMAN firmware address).
Signed-off-by: Николай Пузанов <punzik@gmail.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-20 11:51:26 -07:00
Shengzhou Liu
424bf94273 powerpc/sec: Add workaround for SEC A-003571
Multiple read/write transactions initiated by security
engine may cause system to hang.
Workaround: set MCFGR[AXIPIPE] to 0 to avoid hang.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-20 10:47:07 -07:00
Shaohui Xie
1c68d01eea powerpc/t4240: add QSGMII interface support
Also some fix for QSGMII.
1. fix QSGMII configure of Serdes2.
2. fix PHY address of QSGMII MAC9 & MAC10 for each FMAN.
3. fix dtb for QSGMII interface.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-20 10:46:48 -07:00
Shruti Kanetkar
6b44d9e5b7 powerpcv2: Print hardcoded size like print_size() does
Makes the startup output more consistent

Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-20 10:38:12 -07:00
Shruti Kanetkar
2f848f97d7 powerpc: Use print_size() where appropriate
Makes the startup output more consistent

Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-20 10:37:58 -07:00
Prabhakar Kushwaha
997399fa42 powerpc: Fix CamelCase checkpatch warnings
85xx, 86xx PowerPC folders have code variables with CamelCase naming conventions.
because of this code checkpatch script generates "WARNING: Avoid CamelCase".

Convert variables name to normal naming convention and modify board, driver
files with updated the new structure.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-20 09:57:51 -07:00
Ying Zhang
bb0dc1084f powerpc: mpc85xx: Support booting from SD Card with SPL
The code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.

The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are two stage uboot images:
	* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that
	ddr spd code can get the interleaving mode setting in env. It loads
	final uboot image from offset 96KB.
	* final uboot image, size is variable depends on the functions enabled.

Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-20 09:47:26 -07:00
Ying Zhang
0151d99d74 powerpc: deleted unused symbol CONFIG_SPL_NAND_MINIMAL and enabled some functionality for common SPL
1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful
in the common SPL. So, enabled some functionality for common SPL.

Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-20 09:47:15 -07:00
Matthias Fuchs
3fb8588912 ppc4xx: Remove support for PPC405CR CPUs
This patch removes support for the APM 405CR CPU.
This CPU is EOL and no board uses this chip.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
2013-08-20 11:35:24 -04:00
Chunhe Lan
9c3f77eb3b fsl_i2c: add workaround for the erratum I2C A004447
This workaround is for the erratum I2C A004447. Device reference
manual provides a scheme that allows the I2C master controller
to generate nine SCL pulses, which enable an I2C slave device
that held SDA low to release SDA. However, due to this erratum,
this scheme no longer works. In addition, when I2C is used as
a source of the PBL, the state machine is not able to recover.

At the same time, delete the reduplicative definition of SVR_VER
and SVR_REV. The SVR_REV is the low 8 bits rather than the low 16
bits of svr. And we use the CONFIG_SYS_FSL_A004447_SVR_REV macro
instead of hard-code value 0x10, 0x11 and 0x20.

The CONFIG_SYS_FSL_A004447_SVR_REV = 0x00 represents that one
version of platform has this I2C errata. So enable this errata
by IS_SVR_REV(svr, maj, min) function.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
2013-08-20 11:15:31 +02:00
Wolfgang Denk
cb3761ea99 SPDX-License-Identifier: convert BSD-3-Clause files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini Don't remove some copyrights by accident]
Signed-off-by: Tom Rini <trini@ti.com>
2013-08-19 15:45:35 -04:00
Wolfgang Denk
46263f2de4 SPDX-License-Identifier: convert PIBS licensed files
This commit adapts the files that were derived from PIBS (PowerPC
Initialization and Boot Software) codeto using SPDX License
Identifiers.

So far, SPDX has not assigned an official License ID for the PIBS
license yet, so this should be considered preliminary.

Note that the following files contained incorrect license information:

	arch/powerpc/cpu/ppc4xx/4xx_uart.c
	arch/powerpc/cpu/ppc4xx/start.S
	arch/powerpc/include/asm/ppc440.h

These files included, in addition to the GPL-2.0 / ibm-pibs dual
license as inherited from PIBS, a GPL-2.0+ license header which was
obviously incorrect.  This has been removed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>

Conflicts:
	Licenses/README
Acked-by: Stefan Roese <sr@denx.de>
2013-08-19 15:34:14 -04:00
Wolfgang Denk
bcd4d4eb2b SPDX-License-Identifier: fixing some problematic GPL-2.0 files
Unlike the other patches in this series so far, this commit fixes a
ambiguity in the license terms for some OMAP files:  the code was
originally derived from the Linux kernel sources, where it was clearly
marked as GPL-2.0 (i. e. without the "or later" part), but the U-Boot
version had a GPL-2.0+ file header added, apparently without
permission / relicensing from the original authors of the code.

Insert a GPL-2.0 SPDX-License-Identifier to fix this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Acked-by: Tom Rini <trini@ti.com>
2013-08-19 15:34:13 -04:00
Tom Rini
e20cc2ca15 Merge branch 'master' of git://88.191.163.10/u-boot-arm
Fixup an easy conflict over adding the clk_get prototype and USB_OTG
defines for am33xx having moved.

Conflicts:
	arch/arm/include/asm/arch-am33xx/hardware.h

Signed-off-by: Tom Rini <trini@ti.com>
2013-08-18 14:14:34 -04:00
Albert ARIBAUD
9ed887caec Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-08-17 18:24:13 +02:00
TENART Antoine
dcf846d5da Add TI816X support
Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com>
[trini: Fix warnings about vtp things in emif4.c, adapt AM43XX]
Signed-off-by: Tom Rini <trini@ti.com>
2013-08-15 18:38:37 -04:00
TENART Antoine
9ed6e41239 Prepare for TI816X : reuse existing code from TI814X
Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX

Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com>
[trini: Adapt for CONFIG_OMAP_COMMON changes, AM43XX]
Signed-off-by: Tom Rini <trini@ti.com>
2013-08-15 18:38:37 -04:00
Heiko Schocher
9c8deaeeb7 arm, da850: enable the correct uart in arch_cpu_init()
in arch_cpu_init() uart2 is fix enabled, without reference the
setting from CONFIG_SYS_NS16550_COM1. Use the setting from
CONFIG_SYS_NS16550_COM1 for enabling the console.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
2013-08-15 18:38:36 -04:00
Heiko Schocher
78056717e3 arm/davinci/da850: add uart0_pins_rtscts and RMII_MHz_50_CLK in emac_pins_rmii pinmux
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
2013-08-15 18:38:36 -04:00
Tom Rini
ec101fdb8d arm: spl: For Falcon Mode, set a default machid of ~0
With device trees, boards do not always set CONFIG_MACH_TYPE now, so we
must not rely on this define being set.  The kernel uses ~0 to see if we
have a valid machine number or not, so set that as the default, invalid
machine, id and only fix if CONFIG_MACH_TYPE is set.

Acked-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@ti.com>
2013-08-15 18:38:35 -04:00
Taras Kondratiuk
0474fb0e2b omap: emif: Set initial DDR PHY config first
Commit "OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon"
(f40107345c)
changed sequence to set final DDR PHY config register value at the beginning.
Looks like it was made by mistake and should be reverted.

Signed-off-by: Taras Kondratiuk <taras@ti.com>
2013-08-15 18:38:35 -04:00
Masahiro Yamada
2f6af82719 ARM: omap24xx: remove remainders of dead board
Since Commit 7f5eef9 removed OMAP2420H4 support,
arm1136/omap24xx has not been used at all.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-08-15 18:38:33 -04:00
Naumann Andreas
a704a6d615 ARM: omap3: Implement dpll5 (HSUSB clk) workaround for OMAP36xx/AM/DM37xx according to errata sprz318e.
In chapter 'Advisory 2.1 USB Host Clock Drift Causes USB Spec Non-compliance in Certain Configurations' of the TI Errata it is recommended to use certain div/mult values for the DPLL5 clock setup.
So far u-boot used the old 34xx values, so I added the errata recommended values specificly for 36xx init only.
Also, the FSEL registers exist no longer, so removed them from init.

Tested this on a AM3703 board with 19.2MHz oscillator, which previously couldnt lock the dpll5 (kernel complained). As a consequence the EHCI USB port wasnt usable in U-Boot and kernel. With this patch, kernel panics disappear and USB working fine in u-boot and kernel.

Signed-off-by: Andreas Naumann <anaumann@ultratronik.de>
[trini: Add extern to <asm/arch-omap3/clock.h>
Signed-off-by: Tom Rini <trini@ti.com>
2013-08-15 09:09:29 -04:00
Lokesh Vutla
571804086f ARM: AM43xx: Add build support
Add AM43xx support in the required places

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15 08:51:10 -04:00
Lokesh Vutla
806d279247 ARM: OMAP: Add CONFIG_OMAP_COMMON
Adding a new CONFIG_OMAP_COMMON which is included by all boards
that needs to build cpu/armv7/omap-common folder.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15 08:51:10 -04:00
Lokesh Vutla
3b34ac13fe ARM: AM43xx: clocks: Add dpll and clock data
Add dpll and clock data for AM43xx

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15 08:51:10 -04:00
Lokesh Vutla
c06e498a16 ARM: AM43xx: Add header files
Adding the following data:
-> Prcm structure
-> Base addresses
-> Pin mux structure.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15 08:51:10 -04:00
Heiko Schocher
0660481a59 ARM: AM33xx: Move s_init to a common place
s_init has the same outline for all the AM33xx based
board. So making it generic.
This also helps in addition of new Soc with minimal changes.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2013-08-15 08:51:10 -04:00
Lokesh Vutla
95cb69faeb ARM: AM33xx: Cleanup clocks layer
Cleaning up the clocks layer.
This helps in addition of new Soc with minimal
changes.
This is derived from OMAP4 boards.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2013-08-15 08:51:10 -04:00
Lokesh Vutla
94d77fb656 ARM: AM33xx: Cleanup dplls data
Locking sequence for all the dplls is same.
In the current code same sequence is done repeatedly
for each dpll. Instead have a generic function
for locking dplls and pass dpll data to that function.

This is derived from OMAP4 boards.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2013-08-15 08:51:10 -04:00
ramneek mehresh
61033367a0 powerpc/usb: Depricate usb_phy_type and usb_dr_mode uboot env variables
Remove getting values of usb mode and phy_type from "usb_dr_mode"
and "usb_phy_type" uboot env variables. Now, these are determined
only from hwconfig string

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-14 10:58:21 -07:00