This boards used old type preprocessor.
This patch fix compile error.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This boards used old type preprocessor.
This patch fix compile error.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
AP325RXA is SH7723's reference board.
This has SCIF, NOR Flash, Ethernet, USB host, LCDC, SD Host, Camera and other.
In this patch, support SCIF, NOR Flash, and Ethernet.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Renesas SH7723 has 5 SCIF, SD, Camera, LCDC and other.
This patch supports CPU register's header file and SCIF serial driver.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This adds initial support for the RTE RSK+ SH7203 board.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This board has SH7785, 512MB DDR2-SDRAM, NOR Flash,
Graphic, Ethernet, USB, SD, RTC, and I2C controller.
This patch supports the following functions:
- 128MB DDR2-SDRAM (29-bit address mode only)
- NOR Flash
- USB host
- Ethernet
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This is needed since now with HUSH enabled (amcc-common.h) the image
read from NAND exceeds the previous limit.
Signed-off-by: Stefan Roese <sr@denx.de>
MPC5121 rev 2 silicon has a new register for controlling how long
CS is asserted after deassertion of ALE in multiplexed mode.
The default is to assert CS together with ALE. The alternative
is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE.
The default is wrong for the NOR flash and CPLD on the ADS5121.
This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD)
it does so conditionally based on silicon rev 2.0 or greater.
Signed-off-by: Martha J Marx <mmarx@silicontkx.com>
Signed-off-by: John Rigby <jrigby@freescale.com>
Add FEC pin set and mii reset in __mii_init(). Change
legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
change cfi_offset to 0, and change CFG_FLASH_CFI to
CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
M54455EVB env settings in configuration file.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We
also have SERDES init code for the 8536.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
The main purpose of this rewrite it to be able to share the same
initialization code on all FSL PowerPC products that have DDR
controllers. (83xx, 85xx, 86xx).
The code is broken up into the following steps:
GET_SPD
COMPUTE_DIMM_PARMS
COMPUTE_COMMON_PARMS
GATHER_OPTS
ASSIGN_ADDRESSES
COMPUTE_REGS
PROGRAM_REGS
This allows us to share more code an easily allow for board specific code
overrides.
Additionally this code base adds support for >4G of DDR and provides a
foundation for supporting interleaving on processors with more than one
controller.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Provide a helper function that will setup the last available
LAWs (upto 2) for DDR. Useful for SPD/dyanmic DDR setting code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
